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Use VecDeque instead of Vec in sigverify stage (#22538) (#22550)

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avoid bad performance of remove(0) for a single sender

(cherry picked from commit 49443406fd)

# Conflicts:
#	core/src/sigverify_stage.rs

Co-authored-by: sakridge <sakridge@gmail.com>
This commit is contained in:
mergify[bot]
2022-01-19 01:46:34 +00:00
committed by GitHub
parent 2546ef4ad6
commit 2b87d99479
2 changed files with 18 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
core/benches/sigverify_stage.rs
View File

@ -1,4 +1,5 @@
#![feature(test)] #![feature(test)]
#![allow(clippy::integer_arithmetic)]
extern crate solana_core; extern crate solana_core;
extern crate test; extern crate test;
@ -22,8 +23,7 @@ use {
test::Bencher, test::Bencher,
}; };
#[bench] fn run_bench_packet_discard(num_ips: usize, bencher: &mut Bencher) {
fn bench_packet_discard(bencher: &mut Bencher) {
solana_logger::setup(); solana_logger::setup();
let len = 30 * 1000; let len = 30 * 1000;
let chunk_size = 1024; let chunk_size = 1024;
@ -32,7 +32,7 @@ fn bench_packet_discard(bencher: &mut Bencher) {
let mut total = 0; let mut total = 0;
let ips: Vec<_> = (0..10_000) let ips: Vec<_> = (0..num_ips)
.into_iter() .into_iter()
.map(|_| { .map(|_| {
let mut addr = [0u16; 8]; let mut addr = [0u16; 8];
@ -60,6 +60,16 @@ fn bench_packet_discard(bencher: &mut Bencher) {
}); });
} }
#[bench]
fn bench_packet_discard_many_senders(bencher: &mut Bencher) {
run_bench_packet_discard(1000, bencher);
}
#[bench]
fn bench_packet_discard_single_sender(bencher: &mut Bencher) {
run_bench_packet_discard(1, bencher);
}
#[bench] #[bench]
fn bench_sigverify_stage(bencher: &mut Bencher) { fn bench_sigverify_stage(bencher: &mut Bencher) {
solana_logger::setup(); solana_logger::setup();

10
core/src/sigverify_stage.rs
View File

@ -13,7 +13,7 @@ use {
solana_sdk::timing, solana_sdk::timing,
solana_streamer::streamer::{self, PacketBatchReceiver, StreamerError}, solana_streamer::streamer::{self, PacketBatchReceiver, StreamerError},
std::{ std::{
collections::HashMap, collections::{HashMap, VecDeque},
sync::mpsc::{Receiver, RecvTimeoutError}, sync::mpsc::{Receiver, RecvTimeoutError},
thread::{self, Builder, JoinHandle}, thread::{self, Builder, JoinHandle},
time::Instant, time::Instant,
@ -145,17 +145,17 @@ impl SigVerifyStage {
for (packet_index, packets) in batch.packets.iter().enumerate() { for (packet_index, packets) in batch.packets.iter().enumerate() {
let e = received_ips let e = received_ips
.entry(packets.meta.addr().ip()) .entry(packets.meta.addr().ip())
.or_insert_with(Vec::new); .or_insert_with(VecDeque::new);
e.push((batch_index, packet_index)); e.push_back((batch_index, packet_index));
} }
} }
let mut batch_len = 0; let mut batch_len = 0;
while batch_len < max_packets { while batch_len < max_packets {
for (_ip, indexes) in received_ips.iter_mut() { for (_ip, indexes) in received_ips.iter_mut() {
if !indexes.is_empty() { if !indexes.is_empty() {
indexes.remove(0); indexes.pop_front();
batch_len += 1; batch_len += 1;
if batch_len >= MAX_SIGVERIFY_BATCH { if batch_len >= max_packets {
break; break;
} }
} }