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Page-pin packet memory for cuda (#4250)

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* Page-pin packet memory for cuda

Bring back recyclers and pin offset buffers

* Add packet recycler to streamer

* Add set_pinnable to sigverify vecs to pin them

* Add packets reset test

* Add test for recycler and reduce the gc lock critical section
* Add comments/tests to cuda_runtime

* Add recycler to recv_blobs path.

* Add trace/names for debug and PacketsRecycler to bench-streamer

* Predict realloc and unpin beforehand.

* Add helper to reserve and pin

* Cap buffered packets length

* Call cuda wrapper functions
This commit is contained in:
sakridge
2019-06-27 09:32:32 +02:00
committed by GitHub
parent 44a572416d
commit fbea9d8621
13 changed files with 613 additions and 56 deletions
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5
core/benches/sigverify.rs
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@@ -3,6 +3,7 @@
extern crate test;
use solana::packet::to_packets;
use solana::recycler::Recycler;
use solana::sigverify;
use solana::test_tx::test_tx;
use test::Bencher;
@@ -14,8 +15,10 @@ fn bench_sigverify(bencher: &mut Bencher) {
// generate packet vector
let batches = to_packets(&vec![tx; 128]);
let recycler = Recycler::default();
let recycler_out = Recycler::default();
// verify packets
bencher.iter(|| {
let _ans = sigverify::ed25519_verify(&batches);
let _ans = sigverify::ed25519_verify(&batches, &recycler, &recycler_out);
})
}