mergify[bot] 81e65eae0b Use VecDeque instead of Vec in sigverify stage (#22538) (#22549) ...

avoid bad performance of remove(0) for a single sender

(cherry picked from commit 49443406fd)

# Conflicts:
#	core/src/sigverify_stage.rs

Co-authored-by: sakridge <sakridge@gmail.com>

2022-01-17 22:19:25 +00:00

..

benches

Use VecDeque instead of Vec in sigverify stage (#22538) (#22549)

2022-01-17 22:19:25 +00:00

src

Use VecDeque instead of Vec in sigverify stage (#22538) (#22549)

2022-01-17 22:19:25 +00:00

tests

Revert "Revert "Reformat imports to a consistent style for imports""

2021-12-16 19:28:48 -07:00

.gitignore

tmp dirs target to farf (#5079)

2019-07-12 18:28:42 -07:00

build.rs

Remove frozen ABI modules from solana-sdk

2020-10-20 16:11:30 -07:00

Cargo.toml

Bump version to v1.8.13

2022-01-08 12:27:11 -07:00