fbea9d8621
* Page-pin packet memory for cuda Bring back recyclers and pin offset buffers * Add packet recycler to streamer * Add set_pinnable to sigverify vecs to pin them * Add packets reset test * Add test for recycler and reduce the gc lock critical section * Add comments/tests to cuda_runtime * Add recycler to recv_blobs path. * Add trace/names for debug and PacketsRecycler to bench-streamer * Predict realloc and unpin beforehand. * Add helper to reserve and pin * Cap buffered packets length * Call cuda wrapper functions
25 lines
550 B
Rust
25 lines
550 B
Rust
#![feature(test)]
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extern crate test;
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use solana::packet::to_packets;
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use solana::recycler::Recycler;
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use solana::sigverify;
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use solana::test_tx::test_tx;
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use test::Bencher;
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#[bench]
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fn bench_sigverify(bencher: &mut Bencher) {
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let tx = test_tx();
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// generate packet vector
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let batches = to_packets(&vec![tx; 128]);
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let recycler = Recycler::default();
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let recycler_out = Recycler::default();
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// verify packets
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bencher.iter(|| {
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let _ans = sigverify::ed25519_verify(&batches, &recycler, &recycler_out);
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})
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}
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