2022-08-18 12:32:57 -07:00
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#include "mlir/Dialect/GPU/GPUDialect.h"
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#include "mlir/IR/Dialect.h"
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#include "mlir/Pass/Pass.h"
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#include "triton/Analysis/Allocation.h"
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#include "triton/Analysis/Membar.h"
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using namespace mlir;
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namespace {
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struct TestMembarPass
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: public PassWrapper<TestMembarPass, OperationPass<FuncOp>> {
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// LLVM15+
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// MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestMembarPass);
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StringRef getArgument() const final { return "test-print-membar"; }
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StringRef getDescription() const final {
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return "print the result of the allocation pass";
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}
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void runOnOperation() override {
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Operation *operation = getOperation();
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auto &os = llvm::errs();
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// Convert to std::string can remove quotes from op_name
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auto op_name = SymbolTable::getSymbolName(operation).getValue().str();
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os << op_name << "\n";
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Allocation allocation(operation);
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2022-12-01 11:54:18 -08:00
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MembarAnalysis membarPass(&allocation);
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membarPass.run();
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2022-08-18 12:32:57 -07:00
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size_t operationId = 0;
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operation->walk<WalkOrder::PreOrder>([&](Operation *op) {
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2022-09-09 12:03:41 -07:00
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if (isa<gpu::BarrierOp>(op)) {
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2022-08-18 12:32:57 -07:00
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os << "Membar " << operationId << "\n";
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}
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if (op->getNumRegions() == 0) {
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// Don't count parent Operation to simplify the test.
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operationId++;
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}
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return;
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});
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}
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};
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} // namespace
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namespace mlir {
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namespace test {
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void registerTestMembarPass() { PassRegistration<TestMembarPass>(); }
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} // namespace test
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} // namespace mlir
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