2021-07-27 12:38:38 -07:00
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#ifndef _TRITON_CODEGEN_PASS_H_
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#define _TRITON_CODEGEN_PASS_H_
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2021-04-20 22:29:40 -04:00
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#include <memory>
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2021-07-27 12:38:38 -07:00
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2021-09-09 00:04:28 -07:00
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namespace llvm{
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class Module;
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class LLVMContext;
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}
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2021-07-27 12:38:38 -07:00
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namespace triton{
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2021-09-09 00:04:28 -07:00
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namespace codegen {
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class target;
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}
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2021-07-27 12:38:38 -07:00
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namespace ir{
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class module;
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}
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namespace driver{
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class device;
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class module;
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class kernel;
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}
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}
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2021-04-20 22:29:40 -04:00
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namespace triton{
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namespace codegen{
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2021-04-20 22:29:40 -04:00
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// TODO:
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// There should be a proper pass manager there!
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2021-09-09 00:04:28 -07:00
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std::unique_ptr<llvm::Module> add_passes_to_emit_bin(ir::module &ir, llvm::LLVMContext& ctx,
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codegen::target* target,
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int sm, int num_warps,
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2021-10-18 13:14:04 +08:00
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int num_stages, int &shared_static);
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2021-07-27 12:38:38 -07:00
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}
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}
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2021-04-20 22:29:40 -04:00
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#endif
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