[OPTIMIZER] Added isRow attribute for dotOperandEncoding of MMAv1 layout
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@@ -416,15 +416,36 @@ In TritonGPU dialect, considering `d = tt.dot a, b, c`
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tt.dot's operands a and b must be of DotOperandEncodingAttr layout.
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a's opIdx is 0, b's opIdx is 1.
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The parend field in DotOperandEncodingAttr is the layout of d.
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For MMA v1, an additional attribute `isMMAv1Row` determines whether e.g. the a operand is used
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in the context of an mma.884.row.col or an mma.884.col.col operation. See the PTX ISA documentation
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section 9.7.13.4.1 for more details.
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}];
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let parameters = (
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ins
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"unsigned":$opIdx,
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"Attribute":$parent
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"Attribute":$parent,
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"Attribute":$isMMAv1Row
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);
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let builders = [
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AttrBuilder<(ins "unsigned":$opIdx,
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"Attribute":$parent), [{
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if(parent.isa<MmaEncodingAttr>() &&
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parent.cast<MmaEncodingAttr>().getVersion() == 1){
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llvm::errs() << "DotOperand for MMAv1 must have isMMAv1Row field\n";
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return {};
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}
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Attribute none;
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return $_get(context, opIdx, parent, none);
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}]>
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];
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let extraClassDeclaration = extraBaseClassDeclaration;
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}
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#endif
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@@ -3428,6 +3428,16 @@ Value ConvertLayoutOpConversion::lowerSharedToDotOperandMMA(
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} else if (!isOuter && mmaLayout.getVersion() == 1 &&
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isHMMA) { // tensor core v1
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DotOpMmaV1ConversionHelper helper(mmaLayout);
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bool isMMAv1Row = dotOperandLayout.getIsMMAv1Row().cast<BoolAttr>().getValue();
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auto srcSharedLayout = src.getType().cast<RankedTensorType>().getEncoding().cast<SharedEncodingAttr>();
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// Can only convert [1, 0] to row or [0, 1] to col for now
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if((srcSharedLayout.getOrder()[0] == 1 && !isMMAv1Row) ||
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(srcSharedLayout.getOrder()[0] == 0 && isMMAv1Row)){
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llvm::errs() << "Unsupported Shared -> DotOperand[MMAv1] conversion\n";
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return Value();
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}
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if (dotOperandLayout.getOpIdx() == 0) { // operand $a
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// TODO[Superjomn]: transA is not available here.
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bool transA = false;
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@@ -589,15 +589,22 @@ Attribute DotOperandEncodingAttr::parse(AsmParser &parser, Type type) {
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return {};
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unsigned opIdx = attrs.get("opIdx").cast<IntegerAttr>().getInt();
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Attribute parent = attrs.get("parent");
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Attribute isMMAv1Row;
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if(parent.isa<MmaEncodingAttr>() &&
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parent.cast<MmaEncodingAttr>().getVersion() == 1){
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isMMAv1Row = attrs.get("isMMAv1Row");
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}
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return parser.getChecked<DotOperandEncodingAttr>(parser.getContext(), opIdx,
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parent);
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parent, isMMAv1Row);
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}
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void DotOperandEncodingAttr::print(mlir::AsmPrinter &printer) const {
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printer << "<{"
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<< "opIdx = " << getOpIdx() << ", "
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<< "parent = " << getParent() << "}>";
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<< "parent = " << getParent();
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if(getIsMMAv1Row())
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printer << ", isMMAv1Row = " << getIsMMAv1Row();
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printer << "}>";
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}
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//===----------------------------------------------------------------------===//
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@@ -713,6 +713,46 @@ public:
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}
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};
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class OptimizeBlockedToDotOperand : public mlir::RewritePattern {
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public:
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OptimizeBlockedToDotOperand(mlir::MLIRContext *context)
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: RewritePattern(triton::gpu::ConvertLayoutOp::getOperationName(), 1,
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context) {}
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mlir::LogicalResult
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matchAndRewrite(mlir::Operation *op,
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mlir::PatternRewriter &rewriter) const override {
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auto cvt = cast<triton::gpu::ConvertLayoutOp>(op);
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auto srcType = cvt.getOperand().getType().cast<RankedTensorType>();
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auto dstType = cvt.getResult().getType().cast<RankedTensorType>();
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auto srcBlockedLayout =
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srcType.getEncoding().dyn_cast<triton::gpu::BlockedEncodingAttr>();
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auto dstDotOperandLayout =
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dstType.getEncoding().dyn_cast<triton::gpu::DotOperandEncodingAttr>();
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if (!srcBlockedLayout || !dstDotOperandLayout)
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return failure();
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unsigned opIdx = dstDotOperandLayout.getOpIdx();
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if(!dstDotOperandLayout.getIsMMAv1Row())
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return failure();
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bool isMMAv1Row = dstDotOperandLayout.getIsMMAv1Row().cast<BoolAttr>().getValue();
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if((srcBlockedLayout.getOrder()[0] == 1 && isMMAv1Row) ||
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(srcBlockedLayout.getOrder()[0] == 0 && !isMMAv1Row))
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return failure();
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auto newIsRow = BoolAttr::get(op->getContext(), !isMMAv1Row);
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auto newDstEncoding = triton::gpu::DotOperandEncodingAttr::get(
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op->getContext(), dstDotOperandLayout.getOpIdx(), dstDotOperandLayout.getParent(),
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newIsRow);
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auto newDstType = RankedTensorType::get(
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dstType.getShape(),
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dstType.getElementType(), newDstEncoding);
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auto newCvt = rewriter.create<triton::gpu::ConvertLayoutOp>(
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op->getLoc(), newDstType, cvt.getOperand());
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rewriter.replaceOp(op, newCvt.getResult());
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return success();
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}
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};
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class BlockedToMMA : public mlir::RewritePattern {
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int computeCapability;
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@@ -770,14 +810,28 @@ public:
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Value b = dotOp.b();
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auto oldAType = a.getType().cast<RankedTensorType>();
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auto oldBType = b.getType().cast<RankedTensorType>();
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auto oldAOrder = oldAType.getEncoding().cast<triton::gpu::DotOperandEncodingAttr>()
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.getParent().cast<triton::gpu::BlockedEncodingAttr>().getOrder();
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auto oldBOrder = oldBType.getEncoding().cast<triton::gpu::DotOperandEncodingAttr>()
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.getParent().cast<triton::gpu::BlockedEncodingAttr>().getOrder();
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Attribute isMMAv1RowA;
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Attribute isMMAv1RowB;
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if(version == 1){
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isMMAv1RowA = BoolAttr::get(getContext(), oldAOrder[0] == 1);
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isMMAv1RowB = BoolAttr::get(getContext(), oldBOrder[0] == 1);
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}
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auto newAType = RankedTensorType::get(
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oldAType.getShape(), oldAType.getElementType(),
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triton::gpu::DotOperandEncodingAttr::get(oldAType.getContext(), 0,
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newRetType.getEncoding()));
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newRetType.getEncoding(),
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isMMAv1RowA));
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auto newBType = RankedTensorType::get(
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oldBType.getShape(), oldBType.getElementType(),
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triton::gpu::DotOperandEncodingAttr::get(oldBType.getContext(), 1,
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newRetType.getEncoding()));
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newRetType.getEncoding(),
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isMMAv1RowB));
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a = rewriter.create<triton::gpu::ConvertLayoutOp>(a.getLoc(), newAType, a);
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b = rewriter.create<triton::gpu::ConvertLayoutOp>(b.getLoc(), newBType, b);
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auto newDot = rewriter.create<triton::DotOp>(
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@@ -808,6 +862,7 @@ public:
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mlir::RewritePatternSet patterns(context);
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patterns.add<OptimizeBlockedToShared>(context);
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patterns.add<OptimizeBlockedToDotOperand>(context);
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patterns.add<SimplifyConversion>(context);
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patterns.add<DecomposeDotOperand>(context);
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patterns.add<RematerializeBackward>(context);
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