trying more things
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@@ -104,6 +104,7 @@ SmallVector<unsigned> getSizePerThread(const Attribute &layout) {
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return SmallVector<unsigned>(blockedLayout.getSizePerThread().begin(),
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blockedLayout.getSizePerThread().end());
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} else if (auto sliceLayout = layout.dyn_cast<SliceEncodingAttr>()) {
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return {1};
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return getSizePerThread(sliceLayout.getParent());
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} else if (auto mmaLayout = layout.dyn_cast<MmaEncodingAttr>()) {
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if (mmaLayout.isAmpere()) {
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@@ -19,6 +19,8 @@
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#include <memory>
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#define int_attr(num) rewriter.getI64IntegerAttr(num)
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using namespace mlir;
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namespace {
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#include "TritonGPUCombine.inc"
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@@ -1153,6 +1155,60 @@ public:
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}
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};
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class LoadConvertToInsertSlice : public mlir::RewritePattern{
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public:
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explicit LoadConvertToInsertSlice(mlir::MLIRContext *context)
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: mlir::RewritePattern(triton::gpu::ConvertLayoutOp::getOperationName(), 2, context) {}
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mlir::LogicalResult
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matchAndRewrite(mlir::Operation *op,
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mlir::PatternRewriter &rewriter) const override {
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auto cvt = cast<triton::gpu::ConvertLayoutOp>(op);
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auto origRetType = cvt.getResult().getType().cast<RankedTensorType>();
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auto shape = origRetType.getShape();
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auto eltType = origRetType.getElementType();
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auto dotOpEncoding = origRetType.getEncoding().dyn_cast<triton::gpu::DotOperandEncodingAttr>();
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if(!dotOpEncoding){
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return failure();
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}
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auto loadOp = dyn_cast<triton::LoadOp>(*cvt.getOperand().getDefiningOp());
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if(!loadOp){
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return failure();
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}
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auto blockedEncoding = loadOp.getType().cast<RankedTensorType>().getEncoding().dyn_cast<triton::gpu::BlockedEncodingAttr>();
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if(!blockedEncoding)
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return failure();
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auto sharedEncoding = triton::gpu::SharedEncodingAttr::get(getContext(), dotOpEncoding, shape,
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blockedEncoding.getOrder(), eltType);
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auto srcTy = RankedTensorType::get({1, shape[0], shape[1]},
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eltType,
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sharedEncoding);
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auto loadTensor = rewriter.create<triton::gpu::AllocTensorOp>(op->getLoc(), srcTy);
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auto newOp = rewriter.create<triton::gpu::InsertSliceAsyncOp>(
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op->getLoc(), loadTensor.getType(),
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loadOp.ptr(),
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loadTensor, rewriter.create<arith::ConstantIntOp>(op->getLoc(), 0, 32),
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loadOp.mask(),
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loadOp.other(), loadOp.cache(),
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loadOp.evict(), loadOp.isVolatile(), /*axis*/ 0);
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rewriter.create<triton::gpu::AsyncWaitOp>(op->getLoc(), 0);
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auto tmpType = RankedTensorType::get({shape[0], shape[1]}, eltType, sharedEncoding);
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auto tmp = rewriter.create<tensor::ExtractSliceOp>(op->getLoc(), tmpType, newOp,
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SmallVector<OpFoldResult>{int_attr(0), int_attr(0), int_attr(0)},
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SmallVector<OpFoldResult>{int_attr(1),
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int_attr(shape[0]),
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int_attr(shape[1])},
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SmallVector<OpFoldResult>{int_attr(1), int_attr(1), int_attr(1)});
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rewriter.replaceOpWithNewOp<triton::gpu::ConvertLayoutOp>(op, origRetType, tmp);
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return success();
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}
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};
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class FixupLoop : public mlir::RewritePattern {
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public:
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@@ -1224,6 +1280,7 @@ public:
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patterns.add<MoveConvertOutOfLoop>(context);
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patterns.add<MoveConvertOutOfIf>(context);
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patterns.add<BlockedToMMA>(context, computeCapability);
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patterns.add<LoadConvertToInsertSlice>(context);
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if (applyPatternsAndFoldGreedily(m, std::move(patterns)).failed()) {
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signalPassFailure();
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@@ -1,19 +0,0 @@
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import triton
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import triton.language as tl
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# triton kernel
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@triton.jit
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def kernel(X, stride_xm,
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Z, stride_zn,
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BLOCK_M: tl.constexpr, BLOCK_N: tl.constexpr):
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off_m = tl.arange(0, BLOCK_M)
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off_n = tl.arange(0, BLOCK_N)
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Xs = X + off_m[:, None] * stride_xm + off_n[None, :] * 1
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Zs = Z + off_m[:, None] * 1 + off_n[None, :] * stride_zn
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tl.store(Zs, tl.load(Xs))
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ret = triton.compile(kernel, "*fp32,i32,*fp32,i32", constants={"BLOCK_M": 64, "BLOCK_N": 64}, output="ttgir")
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print(ret)
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@@ -1,13 +0,0 @@
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import torch
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import triton
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import triton.language as tl
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@triton.jit
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def kernel(X, stride_xm, stride_xn, BLOCK: tl.constexpr):
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pass
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X = torch.randn(1, device="cuda")
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pgm = kernel[(1,)](X, 1, 1, BLOCK=1024)
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@@ -1562,7 +1562,7 @@ class CompiledKernel:
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if self.shared > max_shared:
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raise OutOfResources(self.shared, max_shared, "shared memory")
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mod, func, n_regs, n_spills = cuda_utils.load_binary(self.metadata["name"], self.asm["cubin"], self.shared, device)
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print(n_regs, n_spills)
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print(self.shared, n_regs, n_spills)
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self.cu_module = mod
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self.cu_function = func
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@@ -194,6 +194,7 @@ def _bwd_kernel(
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empty = torch.empty(128, device="cuda")
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class _attention(torch.autograd.Function):
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@staticmethod
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@@ -220,7 +221,7 @@ class _attention(torch.autograd.Function):
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q.shape[0], q.shape[1], q.shape[2],
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BLOCK_M=BLOCK, BLOCK_N=BLOCK,
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BLOCK_DMODEL=Lk, num_warps=num_warps,
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num_stages=2,
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num_stages=1,
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)
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ctx.save_for_backward(q, k, v, o, L, m)
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@@ -335,7 +336,8 @@ def bench_flash_attention(BATCH, H, N_CTX, D_HEAD, mode, provider, dtype=torch.f
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ms = triton.testing.do_bench(fn, percentiles=None, warmup=warmup, rep=rep)
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flops_per_matmul = 2.*BATCH*H*N_CTX*N_CTX*D_HEAD*0.5
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total_flops = 2*flops_per_matmul
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print(total_flops/ms*1e-9)
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# print(total_flops/ms*1e-9)
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print(ms)
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return ms
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if provider == "flash":
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lengths = torch.full((BATCH,), fill_value=N_CTX, device=device)
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