More progress on TritonGPUTypeConverter & TritonGPUConversionTarget
This commit is contained in:
@@ -9,6 +9,7 @@
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#include "mlir/Dialect/SCF/SCF.h"
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#include "triton/Dialect/Triton/IR/Traits.h"
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#include "triton/Dialect/Triton/IR/Types.h"
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#include "triton/Dialect/Triton/IR/Dialect.h.inc"
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#include "triton/Dialect/Triton/IR/OpsEnums.h.inc"
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@@ -9,6 +9,9 @@
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#include "triton/Dialect/TritonGPU/IR/Dialect.h.inc"
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#define GET_ATTRDEF_CLASSES
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#include "triton/Dialect/TritonGPU/IR/TritonGPUAttrDefs.h.inc"
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#define GET_OP_CLASSES
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#include "triton/Dialect/TritonGPU/IR/Ops.h.inc"
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@@ -2,6 +2,7 @@
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#define TRITONGPU_ATTRDEFS
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include "TritonGPUDialect.td"
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// include "mlir/IR/TensorEncoding.td"
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class TritonGPU_Attr<string name, list<Trait> traits = []>
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: AttrDef<TritonGPU_Dialect, name, traits>;
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@@ -43,7 +44,7 @@ And the associated TritonGPU MLIR
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);
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}
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def TritonGPUCoalescedEncodingAttr : TritonGPU_Attr<"TritonGPUCoalescedEncoding"> {
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def TritonGPUDistributedEncodingAttr : TritonGPU_Attr<"TritonGPUDistributedEncoding"> {
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let mnemonic = "coalesced encoding";
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let description = [{
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@@ -81,7 +82,9 @@ And the associated TritonGPU MLIR
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let parameters = (
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ins
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ArrayRefParameter<"unsigned">:$threadTileSize,
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ArrayRefParameter<"unsigned">:$blockTileSize
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ArrayRefParameter<"unsigned">:$blockTileSize,
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// fastest-changing axis first
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ArrayRefParameter<"unsigned">:$order
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);
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// let genVerifyDecl = 1;
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@@ -90,7 +93,7 @@ And the associated TritonGPU MLIR
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def TritonGPUMmaEncodingAttr : TritonGPU_Attr<"TritonGPUMmaEncoding"> {
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let mnemonic = "mma encoding";
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let description = [{TODO: I think we may be able to implement it as a special-case of Coalesced encoding with maybe one more warpTileSize attribute!}];
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let description = [{TODO: I think we may be able to implement it as a special-case of Distributed encoding with maybe one more warpTileSize attribute!}];
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let parameters = (
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ins
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@@ -2,6 +2,7 @@
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#define TRITONGPU_OPS
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include "triton/Dialect/TritonGPU/IR/TritonGPUDialect.td"
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include "triton/Dialect/TritonGPU/IR/TritonGPUAttrDefs.td"
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include "triton/Dialect/Triton/IR/TritonTypes.td"
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include "mlir/IR/OpBase.td"
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include "mlir/Interfaces/SideEffectInterfaces.td" // NoSideEffect
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@@ -0,0 +1,29 @@
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//===----------------------------------------------------------------------===//
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//
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// Defines utilities to use while converting to the TritonGPU dialect.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TRITON_DIALECT_TRITONGPU_TRANSFORMS_TRITONGPUCONVERSION_H_
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#define TRITON_DIALECT_TRITONGPU_TRANSFORMS_TRITONGPUCONVERSION_H_
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#include "mlir/Transforms/DialectConversion.h"
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namespace mlir {
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class TritonGPUTypeConverter : public TypeConverter {
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public:
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TritonGPUTypeConverter(MLIRContext *context, int numThreads);
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private:
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MLIRContext *context;
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int numThreads;
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};
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class TritonGPUConversionTarget : public ConversionTarget {
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public:
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explicit TritonGPUConversionTarget(MLIRContext &ctx);
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};
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} // namespace mlir
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#endif // TRITON_DIALECT_TRITONGPU_TRANSFORMS_TRITONGPUCONVERSION_H_
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@@ -15,4 +15,5 @@ add_mlir_conversion_library(TritonToTritonGPU
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MLIRPass
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TritonIR
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TritonGPUIR
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)
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TritonGPUConversion
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)
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@@ -1,7 +1,8 @@
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#include "mlir/Transforms/DialectConversion.h"
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#include "triton/Dialect/Triton/IR/Dialect.h"
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#include "mlir/Dialect/Arithmetic/IR/Arithmetic.h"
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#include "triton/Conversion/TritonToTritonGPU/TritonToTritonGPU.h"
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#include "triton/Dialect/TritonGPU/Transforms/TritonGPUConversion.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "mlir/Dialect/Arithmetic/IR/Arithmetic.h"
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#include "../PassDetail.h"
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using namespace mlir;
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@@ -39,7 +40,7 @@ void populateArithmeticPatternsAndLegality(
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target.addDynamicallyLegalDialect<arith::ArithmeticDialect>(
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// TODO: check above rule here
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[](Operation *op){
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return false;
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return true;
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}
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);
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// Rewrite rule
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@@ -47,26 +48,27 @@ void populateArithmeticPatternsAndLegality(
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}
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class ConvertTritonToTritonGPU:
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class ConvertTritonToTritonGPU :
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public ConvertTritonToTritonGPUBase<ConvertTritonToTritonGPU> {
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public:
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void runOnOperation() override {
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MLIRContext *context = &getContext();
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ConversionTarget target(*context);
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// type converter
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TypeConverter typeConverter;
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// rewrite patterns
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RewritePatternSet patterns(context);
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// add rules
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populateArithmeticPatternsAndLegality(typeConverter, patterns, target);
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void runOnOperation() override {
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MLIRContext *context = &getContext();
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TritonGPUConversionTarget target(*context);
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ModuleOp mod = getOperation();
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// int numThreads = mod.getAttr();
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// type converter
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TritonGPUTypeConverter typeConverter(context, /*numThreads*/4*32);
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// rewrite patterns
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RewritePatternSet patterns(context);
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// add rules
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populateArithmeticPatternsAndLegality(typeConverter, patterns, target);
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if(failed(applyPartialConversion(getOperation(), target,
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std::move(patterns))))
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return signalPassFailure();
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}
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if(failed(applyPartialConversion(getOperation(), target,
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std::move(patterns))))
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return signalPassFailure();
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}
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};
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}
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@@ -1 +1,2 @@
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add_subdirectory(IR)
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add_subdirectory(Transforms)
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@@ -1,12 +1,52 @@
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#include "triton/Dialect/TritonGPU/IR/Dialect.h"
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#include "mlir/IR/DialectImplementation.h"
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#include "llvm/ADT/TypeSwitch.h"
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#include <llvm-6.0/llvm/Support/ErrorHandling.h>
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#include "triton/Dialect/TritonGPU/IR/Dialect.cpp.inc"
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using namespace mlir::triton::gpu;
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//===----------------------------------------------------------------------===//
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// Attribute methods
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//===----------------------------------------------------------------------===//
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#define GET_ATTRDEF_CLASSES
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#include "triton/Dialect/TritonGPU/IR/TritonGPUAttrDefs.cpp.inc"
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mlir::Attribute
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TritonGPUDistributedEncodingAttr::parse(mlir::AsmParser &parser, mlir::Type type) {
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llvm_unreachable("Not implemented");
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}
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void TritonGPUDistributedEncodingAttr::print(mlir::AsmPrinter &printer) const {
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llvm_unreachable("Not implemented");
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}
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mlir::Attribute
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TritonGPUMmaEncodingAttr::parse(mlir::AsmParser &parser, ::mlir::Type type) {
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llvm_unreachable("Not implemented");
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}
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void TritonGPUMmaEncodingAttr::print(mlir::AsmPrinter &printer) const {
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llvm_unreachable("Not implemented");
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}
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mlir::Attribute
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TritonGPUSharedEncodingAttr::parse(mlir::AsmParser &parser, ::mlir::Type type) {
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llvm_unreachable("Not implemented");
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}
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void TritonGPUSharedEncodingAttr::print(mlir::AsmPrinter &printer) const {
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llvm_unreachable("Not implemented");
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}
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void TritonGPUDialect::initialize() {
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addOperations<
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#define GET_OP_LIST
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#include "triton/Dialect/TritonGPU/IR/Ops.cpp.inc"
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>();
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}
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#define GET_OP_CLASSES
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#include "triton/Dialect/TritonGPU/IR/Ops.cpp.inc"
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10
lib/Dialect/TritonGPU/Transforms/CMakeLists.txt
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10
lib/Dialect/TritonGPU/Transforms/CMakeLists.txt
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@@ -0,0 +1,10 @@
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add_mlir_dialect_library(TritonGPUConversion
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TritonGPUConversion.cpp
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# ADDITIONAL_HEADER_DIRS
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LINK_LIBS PUBLIC
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TritonIR
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TritonGPUIR
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# MLIRTransformUtils
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)
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68
lib/Dialect/TritonGPU/Transforms/TritonGPUConversion.cpp
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68
lib/Dialect/TritonGPU/Transforms/TritonGPUConversion.cpp
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@@ -0,0 +1,68 @@
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#include "triton/Dialect/TritonGPU/Transforms/TritonGPUConversion.h"
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#include "triton/Dialect/Triton/IR/Dialect.h"
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#include "triton/Dialect/TritonGPU/IR/Dialect.h"
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#include <algorithm>
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using namespace mlir;
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//
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// TypeConverter
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//
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TritonGPUTypeConverter::TritonGPUTypeConverter(MLIRContext *context,
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int numThreads)
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: context(context), numThreads(numThreads) {
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addConversion([&](RankedTensorType tensorType) -> RankedTensorType {
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llvm::ArrayRef<int64_t> shape = tensorType.getShape();
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Type elementType = tensorType.getElementType();
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int64_t rank = tensorType.getRank();
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int64_t numElements = tensorType.getNumElements();
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// TODO: we should raise exception here.
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assert(numElements > numThreads);
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assert(numElements % numThreads == 0);
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// assert no encoding?
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// Now we assume:
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// contiguous = 1, order = 0, 1, 2, ...,
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llvm::SmallVector<unsigned> threadTileSize(rank, 1); // naive layout
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llvm::SmallVector<unsigned> blockTileSize(rank);
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llvm::SmallVector<unsigned> order(rank);
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int remainingThreads = numThreads;
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for (int64_t dim = 0; dim < rank; ++dim) {
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blockTileSize[dim] = std::clamp(remainingThreads, 1, int(shape[dim]));
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order[dim] = dim;
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remainingThreads /= blockTileSize[dim];
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// TODO: will we need repetition?
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}
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Attribute encoding = triton::gpu::TritonGPUDistributedEncodingAttr::get(
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context, threadTileSize, blockTileSize, order);
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return RankedTensorType::get(shape, elementType, encoding);
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});
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}
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//
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// TritonGPUConversion
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//
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TritonGPUConversionTarget::TritonGPUConversionTarget(MLIRContext &context)
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: ConversionTarget(context) {
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addLegalDialect<triton::TritonDialect,
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arith::ArithmeticDialect,
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scf::SCFDialect>();
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// Some ops from SCF are illegal
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addIllegalOp<scf::ExecuteRegionOp, scf::ParallelOp,
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scf::ReduceOp, scf::ReduceReturnOp>();
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// // We have requirements for the data layouts
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// addDynamicallyLegalOp<triton::DotOp>([](triton::DotOp dotOp) -> bool {
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// Attribute aEncoding = dotOp.a().getType().cast<RankedTensorType>().getEncoding();
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// Attribute bEncoding = dotOp.b().getType().cast<RankedTensorType>().getEncoding();
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// if (aEncoding && aEncoding.isa<triton::gpu::TritonGPUSharedEncodingAttr>() &&
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// bEncoding && bEncoding.isa<triton::gpu::TritonGPUSharedEncodingAttr>())
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// return true;
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// return false;
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// });
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}
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@@ -101,6 +101,7 @@ pm = _triton.ir.pass_manager(ctx)
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pm.add_inliner_pass()
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pm.add_triton_combine_pass()
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pm.add_canonicalizer_pass()
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pm.add_convert_triton_to_tritongpu_pass()
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pm.run(mod)
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assert mod.verify()
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