[Triton-MLIR][Backend] Fix many problems to get the pipeline working (#809)

1. Rewrite code generation of insert_slice_async.
2. Correct the wrong index passed to extract_slice in pipeline.
3. Add a prologue in pipeline to wait for dangling cp.asyncs.  
4. Move scf to cf conversion inside TritonGPUToLLVM because we need to
perform membar before scf to cf. It shouldn't be a technical limitation
and could be improved by a more general membar analysis.
5. Use an attribute to memoize the shared memory size and support
dynamic shared memory.
6. Prevent the combine pass to reorder insert_slice and extract_slice
across async_wait

Co-authored-by: Superjomn <yanchunwei@outlook.com>

lib/Analysis/Membar.cpp

@@ -42,18 +42,14 @@ void MembarAnalysis::dfsOperation(Operation *operation,
 
 void MembarAnalysis::transfer(Operation *op, RegionInfo *regionInfo,
                               OpBuilder *builder) {
-  if (op->getNumResults() < 1)
-    return;
-
   if (isa<scf::ForOp>(op) || isa<scf::IfOp>(op) || isa<scf::YieldOp>(op) ||
       isa<triton::gpu::ExtractSliceOp>(op) ||
-      isa<triton::gpu::InsertSliceAsyncOp>(op) ||
       isa<triton::gpu::AllocTensorOp>(op)) {
     // Do not insert barriers before control flow operations and
     // alloc/extract/insert
     // alloc is an allocation op without memory write.
     // In contrast, arith.constant is an allocation op with memory write.
-    // FIXME(Keren): extract and insert are always alias for now
+    // FIXME(Keren): extract is always alias for now
     return;
   }