[CODEGEN] Bugfix in membar pass (#124)

Membar pass on top of master is buggy with asynchronous copy. For example, it doesn't wait for asynchronous copies to complete before recoalescing accumulator in GEMM, which leads to undefined behavior when the program doesn't enter the loop. This PR proposes

include/triton/codegen/analysis/layout.h

@@ -203,7 +203,8 @@ public:
   data_layout* get(size_t id)                                 { return layouts_.at(id); }
   data_layout* get(ir::value *v)                              { return get(layout_of(v));}
   std::map<size_t, data_layout*> &get_all()                   { return layouts_; }
-  size_t tmp(ir::instruction* i)                              { return tmp_.at((ir::value*)i);}
+  bool has_tmp(ir::value* i)                                  { return tmp_.find(i) != tmp_.end(); }
+  int tmp(ir::value* i)                                       { return tmp_.at(i);}
 
   // execution
   void run(ir::module &mod);

include/triton/codegen/transform/membar.h

@@ -26,6 +26,7 @@ class allocation;
 class liveness;
 class layouts;
 class cts;
+class shared_layout;
 
 }
 
@@ -40,6 +41,7 @@ private:
 private:
   bool intersect(const val_set_t &X, const val_set_t &Y);
   int group_of(triton::ir::value *i, std::vector<triton::ir::value *> &async_write);
+  bool intersect_with(analysis::shared_layout* a_layout, analysis::shared_layout* b_layout);
   val_set_t intersect_with(const val_set_t& as, const val_set_t& bs);
   void transfer(ir::basic_block *block, val_vec_t &async_write, val_set_t &sync_write, val_set_t &sync_read,
                 std::set<triton::ir::value *> &safe_war, bool &inserted, ir::builder &builder);

include/triton/ir/utils.h

@@ -17,6 +17,7 @@ class value;
 
 class cfg {
 public:
+  static std::vector<basic_block *> post_order(function* fn);
   static std::vector<basic_block *> reverse_post_order(function* fn);
 };