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@@ -102,8 +102,9 @@
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@@ -119,7 +120,7 @@
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@@ -158,7 +159,7 @@
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@@ -175,10 +176,10 @@
<h1>Introduction<a class="headerlink" href="#introduction" title="Permalink to this headline"></a></h1>
<div class="section" id="motivations">
<h2>Motivations<a class="headerlink" href="#motivations" title="Permalink to this headline"></a></h2>
<p>Over the past decade, Deep Neural Networks (DNNs) have emerged as an important class of Machine Learning (ML) models, capable of achieving state-of-the-art performance across many domains ranging from natural language processing <a class="footnote-reference brackets" href="#id10" id="id1">1</a> to computer vision <a class="footnote-reference brackets" href="#id11" id="id2">2</a> to computational neuroscience <a class="footnote-reference brackets" href="#id12" id="id3">3</a>. The strength of these models lies in their hierarchical structure, composed of a sequence of parametric (e.g., convolutional) and non-parametric (e.g., rectified linearity) <em>layers</em>. This pattern, though notoriously computationally expensive, also generates a large amount of highly parallelizable work particularly well suited for multi- and many- core processors.</p>
<p>Over the past decade, Deep Neural Networks (DNNs) have emerged as an important class of Machine Learning (ML) models, capable of achieving state-of-the-art performance across many domains ranging from natural language processing <a class="reference internal" href="#sutskever2014" id="id1"><span>[SUTSKEVER2014]</span></a> to computer vision <a class="reference internal" href="#redmon2016" id="id2"><span>[REDMON2016]</span></a> to computational neuroscience <a class="reference internal" href="#lee2017" id="id3"><span>[LEE2017]</span></a>. The strength of these models lies in their hierarchical structure, composed of a sequence of parametric (e.g., convolutional) and non-parametric (e.g., rectified linearity) <em>layers</em>. This pattern, though notoriously computationally expensive, also generates a large amount of highly parallelizable work particularly well suited for multi- and many- core processors.</p>
<p>As a consequence, Graphics Processing Units (GPUs) have become a cheap and accessible resource for exploring and/or deploying novel research ideas in the field. This trend has been accelerated by the release of several frameworks for General-Purpose GPU (GPGPU) computing, such as CUDA and OpenCL, which have made the development of high-performance programs easier. Yet, GPUs remain incredibly challenging to optimize for locality and parallelism, especially for computations that cannot be efficiently implemented using a combination of pre-existing optimized primitives. To make matters worse, GPU architectures are also rapidly evolving and specializing, as evidenced by the addition of tensor cores to NVIDIA (and more recently AMD) micro-architectures.</p>
<p>This tension between the computational opportunities offered by DNNs and the practical difficulty of GPU programming has created substantial academic and industrial interest for Domain-Specific Languages (DSLs) and compilers. Regrettably, these systems – whether they be based on polyhedral machinery (<em>e.g.</em>, Tiramisu <a class="footnote-reference brackets" href="#id13" id="id4">4</a>, Tensor Comprehensions <a class="footnote-reference brackets" href="#id14" id="id5">5</a>) or scheduling languages (<em>e.g.</em>, Halide <a class="footnote-reference brackets" href="#id15" id="id6">6</a>, TVM <a class="footnote-reference brackets" href="#id16" id="id7">7</a>) – remain less flexible and (for the same algorithm) markedly slower than the best handwritten compute kernels available in libraries like <a class="reference external" href="https://docs.nvidia.com/cuda/cublas/index.html">cuBLAS</a>, <a class="reference external" href="https://docs.nvidia.com/deeplearning/cudnn/api/index.html">cuDNN</a> or <a class="reference external" href="https://docs.nvidia.com/deeplearning/tensorrt/developer-guide/index.html">TensorRT</a>.</p>
<p>The main premise of this project is the following: programming paradigms based on blocked algorithms <a class="footnote-reference brackets" href="#id17" id="id8">8</a> can facilitate the construction of high-performance compute kernels for neural networks. We specifically revisit traditional “Single Program, Multiple Data” (SPMD <a class="footnote-reference brackets" href="#id18" id="id9">9</a>) execution models for GPUs, and propose a variant in which programs – rather than threads – are blocked. For example, in the case of matrix multiplication, CUDA and Triton differ as follows:</p>
<p>This tension between the computational opportunities offered by DNNs and the practical difficulty of GPU programming has created substantial academic and industrial interest for Domain-Specific Languages (DSLs) and compilers. Regrettably, these systems – whether they be based on polyhedral machinery (<em>e.g.</em>, Tiramisu <a class="reference internal" href="../chapter-2/related-work.html#baghdadi2021" id="id4"><span>[BAGHDADI2021]</span></a>, Tensor Comprehensions <a class="reference internal" href="../chapter-2/related-work.html#vasilache2018" id="id5"><span>[VASILACHE2018]</span></a>) or scheduling languages (<em>e.g.</em>, Halide <a class="reference internal" href="#jrk2013" id="id6"><span>[JRK2013]</span></a>, TVM <a class="reference internal" href="#chen2018" id="id7"><span>[CHEN2018]</span></a>) – remain less flexible and (for the same algorithm) markedly slower than the best handwritten compute kernels available in libraries like <a class="reference external" href="https://docs.nvidia.com/cuda/cublas/index.html">cuBLAS</a>, <a class="reference external" href="https://docs.nvidia.com/deeplearning/cudnn/api/index.html">cuDNN</a> or <a class="reference external" href="https://docs.nvidia.com/deeplearning/tensorrt/developer-guide/index.html">TensorRT</a>.</p>
<p>The main premise of this project is the following: programming paradigms based on blocked algorithms <a class="reference internal" href="#lam1991" id="id8"><span>[LAM1991]</span></a> can facilitate the construction of high-performance compute kernels for neural networks. We specifically revisit traditional “Single Program, Multiple Data” (SPMD <a class="reference internal" href="#auguin1983" id="id9"><span>[AUGUIN1983]</span></a>) execution models for GPUs, and propose a variant in which programs – rather than threads – are blocked. For example, in the case of matrix multiplication, CUDA and Triton differ as follows:</p>
<table class="colwidths-given docutils align-default">
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<col style="width: 50%" />
@@ -221,8 +222,8 @@
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@@ -234,33 +235,51 @@
</div>
<div class="section" id="references">
<h2>References<a class="headerlink" href="#references" title="Permalink to this headline"></a></h2>
<dl class="footnote brackets">
<dt class="label" id="id10"><span class="brackets"><a class="fn-backref" href="#id1">1</a></span></dt>
<dd><p>Sutskever et al., “Sequence to Sequence Learning with Neural Networks”, NIPS 2014</p>
<dl class="citation">
<dt class="label" id="sutskever2014"><span class="brackets"><a class="fn-backref" href="#id1">SUTSKEVER2014</a></span></dt>
<dd><ol class="upperroman simple">
<li><p>Sutskever et al., “Sequence to Sequence Learning with Neural Networks”, NIPS 2014</p></li>
</ol>
</dd>
<dt class="label" id="id11"><span class="brackets"><a class="fn-backref" href="#id2">2</a></span></dt>
<dd><p>Redmon et al., “You Only Look Once: Unified, Real-Time Object Detection”, CVPR 2016</p>
<dt class="label" id="redmon2016"><span class="brackets"><a class="fn-backref" href="#id2">REDMON2016</a></span></dt>
<dd><ol class="upperalpha simple" start="10">
<li><p>Redmon et al., “You Only Look Once: Unified, Real-Time Object Detection”, CVPR 2016</p></li>
</ol>
</dd>
<dt class="label" id="id12"><span class="brackets"><a class="fn-backref" href="#id3">3</a></span></dt>
<dd><p>Lee et al., “Superhuman Accuracy on the SNEMI3D Connectomics Challenge”, ArXiV 2017</p>
<dt class="label" id="lee2017"><span class="brackets"><a class="fn-backref" href="#id3">LEE2017</a></span></dt>
<dd><ol class="upperalpha simple" start="11">
<li><p>Lee et al., “Superhuman Accuracy on the SNEMI3D Connectomics Challenge”, ArXiV 2017</p></li>
</ol>
</dd>
<dt class="label" id="id13"><span class="brackets"><a class="fn-backref" href="#id4">4</a></span></dt>
<dd><p>Baghdadi et al., “Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code”, CGO 2021</p>
<dt class="label" id="baghdadi2021"><span class="brackets"><a class="fn-backref" href="#id4">BAGHDADI2021</a></span></dt>
<dd><ol class="upperalpha simple" start="18">
<li><p>Baghdadi et al., “Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code”, CGO 2021</p></li>
</ol>
</dd>
<dt class="label" id="id14"><span class="brackets"><a class="fn-backref" href="#id5">5</a></span></dt>
<dd><p>Vasilache et al., “Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions”, ArXiV 2018</p>
<dt class="label" id="vasilache2018"><span class="brackets"><a class="fn-backref" href="#id5">VASILACHE2018</a></span></dt>
<dd><ol class="upperalpha simple" start="14">
<li><p>Vasilache et al., “Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions”, ArXiV 2018</p></li>
</ol>
</dd>
<dt class="label" id="id15"><span class="brackets"><a class="fn-backref" href="#id6">6</a></span></dt>
<dd><p>Ragan-Kelley et al., “Halide: A Language and Compiler for Optimizing Parallelism, Locality, and Recomputation in Image Processing Pipelines”, PLDI 2013</p>
<dt class="label" id="jrk2013"><span class="brackets"><a class="fn-backref" href="#id6">JRK2013</a></span></dt>
<dd><ol class="upperalpha simple" start="10">
<li><p>Ragan-Kelley et al., “Halide: A Language and Compiler for Optimizing Parallelism, Locality, and Recomputation in Image Processing Pipelines”, PLDI 2013</p></li>
</ol>
</dd>
<dt class="label" id="id16"><span class="brackets"><a class="fn-backref" href="#id7">7</a></span></dt>
<dd><p>Chen et al., “TVM: An Automated End-to-End Optimizing Compiler for Deep Learning”, OSDI 2018</p>
<dt class="label" id="chen2018"><span class="brackets"><a class="fn-backref" href="#id7">CHEN2018</a></span></dt>
<dd><ol class="upperalpha simple" start="20">
<li><p>Chen et al., “TVM: An Automated End-to-End Optimizing Compiler for Deep Learning”, OSDI 2018</p></li>
</ol>
</dd>
<dt class="label" id="id17"><span class="brackets"><a class="fn-backref" href="#id8">8</a></span></dt>
<dd><p>Lam et al., “The Cache Performance and Optimizations of Blocked Algorithms”, ASPLOS 1991</p>
<dt class="label" id="lam1991"><span class="brackets"><a class="fn-backref" href="#id8">LAM1991</a></span></dt>
<dd><ol class="upperalpha simple" start="13">
<li><p>Lam et al., “The Cache Performance and Optimizations of Blocked Algorithms”, ASPLOS 1991</p></li>
</ol>
</dd>
<dt class="label" id="id18"><span class="brackets"><a class="fn-backref" href="#id9">9</a></span></dt>
<dd><p>Auguin et al., “Opsila: an advanced SIMD for numerical analysis and signal processing”, EUROMICRO 1983</p>
<dt class="label" id="auguin1983"><span class="brackets"><a class="fn-backref" href="#id9">AUGUIN1983</a></span></dt>
<dd><ol class="upperalpha simple" start="13">
<li><p>Auguin et al., “Opsila: an advanced SIMD for numerical analysis and signal processing”, EUROMICRO 1983</p></li>
</ol>
</dd>
</dl>
</div>
@@ -272,8 +291,8 @@
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<p>At first sight, Triton may seem like just yet another DSL for DNNs. The purpose of this section is to contextualize Triton and highlights its differences with the two leading approaches in this domain: polyhedral compilation and scheduling languages.</p>
<div class="section" id="polyhedral-compilation">
<h2>Polyhedral Compilation<a class="headerlink" href="#polyhedral-compilation" title="Permalink to this headline"></a></h2>
<p>Traditional compilers typically rely on intermediate representations, such as LLVM-IR <a class="footnote-reference brackets" href="#id17" id="id1">1</a>, that encode control flow information using (un)conditional branches. This relatively low-level format makes it difficult to statically analyze the runtime behavior (e.g., cache misses) of input programs, and to automatically optimize loops accordingly through the use of tiling <a class="footnote-reference brackets" href="#id18" id="id2">2</a>, fusion <a class="footnote-reference brackets" href="#id19" id="id3">3</a> and interchange <a class="footnote-reference brackets" href="#id20" id="id4">4</a>. To solve this issue, polyhedral compilers <a class="footnote-reference brackets" href="#id21" id="id5">5</a> rely on program representations that have statically predictable control flow, thereby enabling aggressive compile-time program transformations for data locality and parallelism. Though this strategy has been adopted by many languages and compilers for DNNs such as Tiramisu <a class="footnote-reference brackets" href="#id22" id="id6">6</a>, Tensor Comprehensions <a class="footnote-reference brackets" href="#id23" id="id7">7</a>, Diesel <a class="footnote-reference brackets" href="#id24" id="id8">8</a> and the Affine dialect in MLIR <a class="footnote-reference brackets" href="#id25" id="id9">9</a>, it also comes with a number of limitations that will be described later.</p>
<p>Traditional compilers typically rely on intermediate representations, such as LLVM-IR <a class="reference internal" href="#lattner2004" id="id1"><span>[LATTNER2004]</span></a>, that encode control flow information using (un)conditional branches. This relatively low-level format makes it difficult to statically analyze the runtime behavior (e.g., cache misses) of input programs, and to automatically optimize loops accordingly through the use of tiling <a class="reference internal" href="#wolfe1989" id="id2"><span>[WOLFE1989]</span></a>, fusion <a class="reference internal" href="#darte1999" id="id3"><span>[DARTE1999]</span></a> and interchange <a class="reference internal" href="#allen1984" id="id4"><span>[ALLEN1984]</span></a>. To solve this issue, polyhedral compilers <a class="reference internal" href="#ancourt1991" id="id5"><span>[ANCOURT1991]</span></a> rely on program representations that have statically predictable control flow, thereby enabling aggressive compile-time program transformations for data locality and parallelism. Though this strategy has been adopted by many languages and compilers for DNNs such as Tiramisu <a class="reference internal" href="#baghdadi2021" id="id6"><span>[BAGHDADI2021]</span></a>, Tensor Comprehensions <a class="reference internal" href="#vasilache2018" id="id7"><span>[VASILACHE2018]</span></a>, Diesel <a class="reference internal" href="#elango2018" id="id8"><span>[ELANGO2018]</span></a> and the Affine dialect in MLIR <a class="reference internal" href="#lattner2019" id="id9"><span>[LATTNER2019]</span></a>, it also comes with a number of limitations that will be described later in this section.</p>
<div class="section" id="program-representation">
<h3>Program Representation<a class="headerlink" href="#program-representation" title="Permalink to this headline"></a></h3>
<p>Polyhedral compilation is a vast area of research. In this section we only outline the most basic aspects of this topic, but readers interested in the solid mathematical foundations underneath may refer to the ample litterature on linear and integer programming.</p>
@@ -202,7 +203,7 @@
</pre></div>
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</td>
<td><p><a class="reference internal" href="../_images/polyhedral-iteration.png"><img alt="pic1" src="../_images/polyhedral-iteration.png" style="width: 300px;" /></a></p></td>
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@@ -269,14 +270,14 @@ i &amp; j
<div class="section" id="advantages">
<h3>Advantages<a class="headerlink" href="#advantages" title="Permalink to this headline"></a></h3>
<p>Programs amenable to polyhedral compilation can be aggressively transformed and optimized. Most of these transformations actually boil down to the production of schedules and iteration domains that enable loop transformations promoting parallelism and spatial/temporal data locality (e.g., fusion, interchange, tiling, parallelization).</p>
<p>Polyhedral compilers can also automatically go through complex verification processes to ensure that the semantics of their input program is preserved throughout this optimization phase. Note that polyhedral optimizers are not incompatible with more standard optimization techniques. In fact, it is not uncommon for these systems to be implemented as a set of LLVM passes that can be run ahead of more traditional compilation techniques <a class="footnote-reference brackets" href="#id26" id="id10">10</a>.</p>
<p>All in all, polyhedral machinery is extremely powerful, when applicable. It has been shown to support most common loop transformations, and has indeed achieved performance comparable to state-of-the-art GPU libraries for dense matrix multiplication <a class="footnote-reference brackets" href="#id24" id="id11">8</a>. Additionally, it is also fully automatic and doesn’t require any hint from programmers apart from source-code in a C-like format.</p>
<p>Polyhedral compilers can also automatically go through complex verification processes to ensure that the semantics of their input program is preserved throughout this optimization phase. Note that polyhedral optimizers are not incompatible with more standard optimization techniques. In fact, it is not uncommon for these systems to be implemented as a set of LLVM passes that can be run ahead of more traditional compilation techniques <a class="reference internal" href="#grosser2012" id="id10"><span>[GROSSER2012]</span></a>.</p>
<p>All in all, polyhedral machinery is extremely powerful, when applicable. It has been shown to support most common loop transformations, and has indeed achieved performance comparable to state-of-the-art GPU libraries for dense matrix multiplication <a class="reference internal" href="#elango2018" id="id11"><span>[ELANGO2018]</span></a>. Additionally, it is also fully automatic and doesn’t require any hint from programmers apart from source-code in a C-like format.</p>
</div>
<div class="section" id="limitations">
<h3>Limitations<a class="headerlink" href="#limitations" title="Permalink to this headline"></a></h3>
<p>Unfortunately, polyhedral compilers suffer from two major limitations that have prevented its adoption as a universal method for code generation in neural networks.</p>
<p>First, the set of possible program transformations $Omega = { Theta_S ~|~ S in text{program} }$ is large, and grows with the number of statements in the program as well as with the size of their iteration domain. Verifying the legality of each transformation can also require the resolution of complex integer linear programs, making polyhedral compilation very computationally expensive. To make matters worse, hardware properties (e.g., cache size, number of SMs) and contextual characteristics (e.g., input tensor shapes) also have to be taken into account by this framework, leading to expensive auto-tuning procedures <a class="footnote-reference brackets" href="#id27" id="id12">11</a>.</p>
<p>Second, the polyhedral framework is not very generally applicable; SCoPs are relatively common <a class="footnote-reference brackets" href="#id28" id="id13">12</a> but require loop bounds and array subscripts to be affine functions of loop indices, which typically only occurs in regular, dense computations. For this reason, this framework still has to be successfully applied to sparse – or even structured-sparse – neural networks, whose importance has been rapidly rising over the past few years.</p>
<p>First, the set of possible program transformations $Omega = { Theta_S ~|~ S in text{program} }$ is large, and grows with the number of statements in the program as well as with the size of their iteration domain. Verifying the legality of each transformation can also require the resolution of complex integer linear programs, making polyhedral compilation very computationally expensive. To make matters worse, hardware properties (e.g., cache size, number of SMs) and contextual characteristics (e.g., input tensor shapes) also have to be taken into account by this framework, leading to expensive auto-tuning procedures <a class="reference internal" href="#sato2019" id="id12"><span>[SATO2019]</span></a>.</p>
<p>Second, the polyhedral framework is not very generally applicable; SCoPs are relatively common <a class="reference internal" href="#girbal2006" id="id13"><span>[GIRBAL2006]</span></a> but require loop bounds and array subscripts to be affine functions of loop indices, which typically only occurs in regular, dense computations. For this reason, this framework still has to be successfully applied to sparse – or even structured-sparse – neural networks, whose importance has been rapidly rising over the past few years.</p>
<p>On the other hand, blocked program representations advocated by this dissertation are less restricted in scope and can achieve close to peak performance using standard dataflow analysis.</p>
</div>
</div>
@@ -316,7 +317,7 @@ i &amp; j
<span class="o">.</span><span class="n">parallel</span><span class="p">(</span><span class="n">y</span><span class="p">)</span><span class="o">.</span><span class="n">vectorize</span><span class="p">(</span><span class="n">xii</span><span class="p">)</span><span class="o">.</span><span class="n">unroll</span><span class="p">(</span><span class="n">xi</span><span class="p">)</span><span class="o">.</span><span class="n">unroll</span><span class="p">(</span><span class="n">yii</span><span class="p">);</span>
</pre></div>
</td></tr></table></div>
<p>The resulting code may however not be completely portable, as schedules can sometimes rely on execution models (e.g., SPMD) or hardware intrinsics (e.g., matrix-multiply-accumulate) that are not widely available. This issue can be mitigated by auto-scheduling mechanisms <a class="footnote-reference brackets" href="#id29" id="id14">13</a>.</p>
<p>The resulting code may however not be completely portable, as schedules can sometimes rely on execution models (e.g., SPMD) or hardware intrinsics (e.g., matrix-multiply-accumulate) that are not widely available. This issue can be mitigated by auto-scheduling mechanisms <a class="reference internal" href="#mullapudi2016" id="id14"><span>[MULLAPUDI2016]</span></a>.</p>
<div class="section" id="id15">
<h3>Advantages<a class="headerlink" href="#id15" title="Permalink to this headline"></a></h3>
<p>The main advantage of this approach is that it allows programmers to write an algorithm <em>only once</em>, and focus on performance optimization separately. It makes it possible to manually specify optimizations that a polyhedral compiler wouldn’t be able to figure out automatically using static data-flow analysis.</p>
@@ -340,7 +341,7 @@ i &amp; j
</pre></div>
</div>
</td>
<td><p><a class="reference internal" href="../_images/halide-iteration.png"><img alt="pic2" src="../_images/halide-iteration.png" style="width: 300px;" /></a></p></td>
<td><p><a class="reference internal" href="../../_images/halide-iteration.png"><img alt="pic2" src="../../_images/halide-iteration.png" style="width: 300px;" /></a></p></td>
</tr>
</tbody>
</table>
@@ -349,45 +350,71 @@ i &amp; j
</div>
<div class="section" id="references">
<h2>References<a class="headerlink" href="#references" title="Permalink to this headline"></a></h2>
<dl class="footnote brackets">
<dt class="label" id="id17"><span class="brackets"><a class="fn-backref" href="#id1">1</a></span></dt>
<dd><p>Lattner et al., “LLVM: a compilation framework for lifelong program analysis transformation”</p>
<dl class="citation">
<dt class="label" id="lattner2004"><span class="brackets"><a class="fn-backref" href="#id1">LATTNER2004</a></span></dt>
<dd><ol class="upperalpha simple" start="3">
<li><p>Lattner et al., “LLVM: a compilation framework for lifelong program analysis transformation”, CGO 2004</p></li>
</ol>
</dd>
<dt class="label" id="id18"><span class="brackets"><a class="fn-backref" href="#id2">2</a></span></dt>
<dd><p>Wolfe, “More Iteration Space Tiling”, SC 1989</p>
<dt class="label" id="wolfe1989"><span class="brackets"><a class="fn-backref" href="#id2">WOLFE1989</a></span></dt>
<dd><ol class="upperalpha simple" start="13">
<li><p>Wolfe, “More Iteration Space Tiling”, SC 1989</p></li>
</ol>
</dd>
<dt class="label" id="id19"><span class="brackets"><a class="fn-backref" href="#id3">3</a></span></dt>
<dd><p>Darte, “On the Complexity of Loop Fusion”, PACT 1999</p>
<dt class="label" id="darte1999"><span class="brackets"><a class="fn-backref" href="#id3">DARTE1999</a></span></dt>
<dd><ol class="upperalpha simple">
<li><p>Darte, “On the Complexity of Loop Fusion”, PACT 1999</p></li>
</ol>
</dd>
<dt class="label" id="id20"><span class="brackets"><a class="fn-backref" href="#id4">4</a></span></dt>
<dd><p>Allen et al., “Automatic Loop Interchange”, SIGPLAN Notices 1984</p>
<dt class="label" id="allen1984"><span class="brackets"><a class="fn-backref" href="#id4">ALLEN1984</a></span></dt>
<dd><ol class="upperalpha simple" start="10">
<li><p>Allen et al., “Automatic Loop Interchange”, SIGPLAN Notices 1984</p></li>
</ol>
</dd>
<dt class="label" id="id21"><span class="brackets"><a class="fn-backref" href="#id5">5</a></span></dt>
<dd><p>Ancourt et al., “Scanning Polyhedra with DO Loops”, PPoPP 1991</p>
<dt class="label" id="ancourt1991"><span class="brackets"><a class="fn-backref" href="#id5">ANCOURT1991</a></span></dt>
<dd><ol class="upperalpha simple" start="3">
<li><p>Ancourt et al., “Scanning Polyhedra with DO Loops”, PPoPP 1991</p></li>
</ol>
</dd>
<dt class="label" id="id22"><span class="brackets"><a class="fn-backref" href="#id6">6</a></span></dt>
<dd><p>Baghdadi et al., “Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code”, CGO 2021</p>
<dt class="label" id="baghdadi2021"><span class="brackets"><a class="fn-backref" href="#id6">BAGHDADI2021</a></span></dt>
<dd><ol class="upperalpha simple" start="18">
<li><p>Baghdadi et al., “Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code”, CGO 2021</p></li>
</ol>
</dd>
<dt class="label" id="id23"><span class="brackets"><a class="fn-backref" href="#id7">7</a></span></dt>
<dd><p>Vasilache et al., “Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions”, ArXiV 2018</p>
<dt class="label" id="vasilache2018"><span class="brackets"><a class="fn-backref" href="#id7">VASILACHE2018</a></span></dt>
<dd><ol class="upperalpha simple" start="14">
<li><p>Vasilache et al., “Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions”, ArXiV 2018</p></li>
</ol>
</dd>
<dt class="label" id="id24"><span class="brackets">8</span><span class="fn-backref">(<a href="#id8">1</a>,<a href="#id11">2</a>)</span></dt>
<dd><p>Elango et al. “Diesel: DSL for Linear Algebra and Neural Net Computations on GPUs”, MAPL 2018</p>
<dt class="label" id="elango2018"><span class="brackets">ELANGO2018</span><span class="fn-backref">(<a href="#id8">1</a>,<a href="#id11">2</a>)</span></dt>
<dd><ol class="upperalpha simple" start="22">
<li><p>Elango et al. “Diesel: DSL for Linear Algebra and Neural Net Computations on GPUs”, MAPL 2018</p></li>
</ol>
</dd>
<dt class="label" id="id25"><span class="brackets"><a class="fn-backref" href="#id9">9</a></span></dt>
<dd><p>Lattner et al., “MLIR Primer: A Compiler Infrastructure for the End of Moore’s Law”, Arxiv 2019</p>
<dt class="label" id="lattner2019"><span class="brackets"><a class="fn-backref" href="#id9">LATTNER2019</a></span></dt>
<dd><ol class="upperalpha simple" start="3">
<li><p>Lattner et al., “MLIR Primer: A Compiler Infrastructure for the End of Moore’s Law”, Arxiv 2019</p></li>
</ol>
</dd>
<dt class="label" id="id26"><span class="brackets"><a class="fn-backref" href="#id10">10</a></span></dt>
<dd><p>Grosser et al., “Polly - Performing Polyhedral Optimizations on a Low-Level Intermediate Representation”, Parallel Processing Letters 2012</p>
<dt class="label" id="grosser2012"><span class="brackets"><a class="fn-backref" href="#id10">GROSSER2012</a></span></dt>
<dd><ol class="upperalpha simple" start="20">
<li><p>Grosser et al., “Polly - Performing Polyhedral Optimizations on a Low-Level Intermediate Representation”, Parallel Processing Letters 2012</p></li>
</ol>
</dd>
<dt class="label" id="id27"><span class="brackets"><a class="fn-backref" href="#id12">11</a></span></dt>
<dd><p>Sato et al., “An Autotuning Framework for Scalable Execution of Tiled Code via Iterative Polyhedral Compilation”, TACO 2019</p>
<dt class="label" id="sato2019"><span class="brackets"><a class="fn-backref" href="#id12">SATO2019</a></span></dt>
<dd><ol class="upperalpha simple" start="25">
<li><p>Sato et al., “An Autotuning Framework for Scalable Execution of Tiled Code via Iterative Polyhedral Compilation”, TACO 2019</p></li>
</ol>
</dd>
<dt class="label" id="id28"><span class="brackets"><a class="fn-backref" href="#id13">12</a></span></dt>
<dd><p>Girbal et al., “Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory Hierarchies”, International Journal of Parallel Programming 2006</p>
<dt class="label" id="girbal2006"><span class="brackets"><a class="fn-backref" href="#id13">GIRBAL2006</a></span></dt>
<dd><ol class="upperalpha simple" start="19">
<li><p>Girbal et al., “Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory Hierarchies”, International Journal of Parallel Programming 2006</p></li>
</ol>
</dd>
<dt class="label" id="id29"><span class="brackets"><a class="fn-backref" href="#id14">13</a></span></dt>
<dd><p>Mullapudi et al., “Automatically scheduling halide image processing pipelines”, TOG 2016</p>
<dt class="label" id="mullapudi2016"><span class="brackets"><a class="fn-backref" href="#id14">MULLAPUDI2016</a></span></dt>
<dd><ol class="upperalpha simple" start="18">
<li><p>Mullapudi et al., “Automatically scheduling halide image processing pipelines”, TOG 2016</p></li>
</ol>
</dd>
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<p class="caption"><span class="caption-text">Getting Started</span></p>
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<li class="toctree-l1"><a class="reference internal" href="../getting-started/installation.html">Installation</a></li>
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<p><strong>Operators and built-in function</strong>: The usual C operators were extended to support element-wise array operations (<code class="code docutils literal notranslate"><span class="pre">+</span></code>, <code class="code docutils literal notranslate"><span class="pre">-</span></code>, <code class="code docutils literal notranslate"><span class="pre">&amp;&amp;</span></code>, <code class="code docutils literal notranslate"><span class="pre">*</span></code>, etc.) and complex array operations(<code class="code docutils literal notranslate"><span class="pre">&#64;</span></code> for matrix multiplication). Additionally, some built-in functions were added for concurrency (<code class="code docutils literal notranslate"><span class="pre">get_program_id</span></code>, <code class="code docutils literal notranslate"><span class="pre">atomic_add</span></code>).</p>
<p><strong>Slicing and broadcasting</strong>: Multi-dimensional blocks can be broadcast along any particular dimension using numpy-like slicing syntax (e.g., <code class="code docutils literal notranslate"><span class="pre">int</span> <span class="pre">array[8,</span> <span class="pre">8]</span> <span class="pre">=</span> <span class="pre">range[:,</span> <span class="pre">newaxis]</span></code> for stacking columns). Note that, as of now, slicing blocks to retrieve sub-blocks (or scalars) is forbidden as it is incompatible with the automatic parallelization methods used by our JIT. Reductions can be achieved using a syntax similar to slicing (e.g., <code class="code docutils literal notranslate"><span class="pre">array[+]</span></code> for summing an array, or <code class="code docutils literal notranslate"><span class="pre">array[:,</span> <span class="pre">max]</span></code> for row-wise maximum). Currently supported reduction operators are <code class="code docutils literal notranslate"><span class="pre">+</span></code>, <code class="code docutils literal notranslate"><span class="pre">min</span></code>, <code class="code docutils literal notranslate"><span class="pre">max</span></code>.</p>
<p><strong>Masked pointer dereferencement</strong>: Block-level operations in Triton-C are “atomic”, in the sense that they execute either completely or not at all. Basic element-wise control-flow for block-level operations can nonetheless be achieved using ternary operators and the <em>masked pointer dereferencement</em> operator exemplified below:</p>
<div class="highlight-C notranslate"><div class="highlight"><pre><span></span>// create mask
bool mask[16, 16] = ...;
// conditional addition
float x[16, 16] = mask ? a + b : 0;
// conditional load
float y[16] 16] = mask ? *ptr : 0;
// conditional store
*?(mask)ptr = y;
\end{lstlisting}
<div class="highlight-C notranslate"><div class="highlight"><pre><span></span><span class="c1">// create mask</span>
<span class="kt">bool</span> <span class="n">mask</span><span class="p">[</span><span class="mi">16</span><span class="p">,</span> <span class="mi">16</span><span class="p">]</span> <span class="o">=</span> <span class="p">...;</span>
<span class="c1">// conditional addition</span>
<span class="kt">float</span> <span class="n">x</span><span class="p">[</span><span class="mi">16</span><span class="p">,</span> <span class="mi">16</span><span class="p">]</span> <span class="o">=</span> <span class="n">mask</span> <span class="o">?</span> <span class="n">a</span> <span class="o">+</span> <span class="nl">b</span> <span class="p">:</span> <span class="mi">0</span><span class="p">;</span>
<span class="c1">// conditional load</span>
<span class="kt">float</span> <span class="n">y</span><span class="p">[</span><span class="mi">16</span><span class="p">]</span> <span class="mi">16</span><span class="p">]</span> <span class="o">=</span> <span class="n">mask</span> <span class="o">?</span> <span class="o">*</span><span class="nl">ptr</span> <span class="p">:</span> <span class="mi">0</span><span class="p">;</span>
<span class="c1">// conditional store</span>
<span class="o">*?</span><span class="p">(</span><span class="n">mask</span><span class="p">)</span><span class="n">ptr</span> <span class="o">=</span> <span class="n">y</span><span class="p">;</span>
<span class="err">\</span><span class="n">end</span><span class="p">{</span><span class="n">lstlisting</span><span class="p">}</span>
</pre></div>
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@@ -242,7 +244,8 @@ float y[16] 16] = mask ? *ptr : 0;
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<div class="section" id="the-triton-ir-intermediate-representation">
<h1>The Triton-IR Intermediate Representation<a class="headerlink" href="#the-triton-ir-intermediate-representation" title="Permalink to this headline"></a></h1>
<p>Triton-IR is an LLVM-based Intermediate Representation (IR) whose purpose is to provide an environment suitable for block-level program analysis, transformation and optimization.
In our implementation, Triton-IR programs are constructed directly from Triton-C after parsing, but they could also be formed directly by higher-level DSLs in the future.
Triton-IR and LLVM-IR programs share the same high-level structure, but the former also includes a number of extensions necessary for block-level data-flow analysis.
These extensions are crucial for carrying out the optimizations outlined in the next chapter of this document.</p>
<div class="section" id="structure-of-a-triton-ir-program">
<h2>Structure of a Triton-IR Program<a class="headerlink" href="#structure-of-a-triton-ir-program" title="Permalink to this headline"></a></h2>
<div class="section" id="modules">
<h3>Modules<a class="headerlink" href="#modules" title="Permalink to this headline"></a></h3>
<p>At the highest level, Triton-IR programs consist of one or multiple basic units of compilation known as <em>modules</em>. These modules are compiled independently from one another, and eventually aggregated by a linker whose role is to resolve forward declarations and adequately merge global definitions. Each module itself is composed of functions, global variables, constants and other miscellaneous symbols such as metadata and attributes.</p>
</div>
<div class="section" id="functions">
<h3>Functions<a class="headerlink" href="#functions" title="Permalink to this headline"></a></h3>
<p>Triton-IR function definitions consist of a return type, a name and a potentially empty arguments list. Additional visibility, alignment and linkage specifiers can be added if desired. Function attributes (such as inlining hints) and parameter attributes (such as “readonly”, aliasing hints) can also be specified, allowing compiler backends to perform more aggressive optimizations by, for instance, making better use of non-coherent caches found on NVIDIA GPUs. This header is followed by a body composed of a list of basic blocks whose interdependencies form the Control Flow Graph (CFG) of the function.</p>
</div>
<div class="section" id="basic-blocks">
<h3>Basic Blocks<a class="headerlink" href="#basic-blocks" title="Permalink to this headline"></a></h3>
<p>Basic blocks are straight-line code sequences that may only contain so-called <em>terminator</em> instructions (i.e., branching, return) at their end. To simplify program analysis, Triton-IR uses the Static Single Assignment (SSA) form, meaning that each variable in each basic block must be (1) assigned to only once and (2) defined before being used. In so doing, each basic block implicitly defines a Data-Flow Graph (DFG). In our case, the SSA form is created directly from Triton-C’s Abstract Syntax Trees (ASTs) using an algorithm from the literature <a class="reference internal" href="#braun13" id="id1"><span>[BRAUN13]</span></a>.</p>
</div>
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<div class="section" id="block-level-dataflow-analysis">
<h2>Block-Level Dataflow Analysis<a class="headerlink" href="#block-level-dataflow-analysis" title="Permalink to this headline"></a></h2>
<div class="section" id="types">
<h3>Types<a class="headerlink" href="#types" title="Permalink to this headline"></a></h3>
<p>Multi-dimensional blocks are at the center of data-flow analysis in Triton-JIT. They can be declared using syntax similar to vector declarations in LLVM-IR. For example, <code class="code docutils literal notranslate"><span class="pre">i32&lt;8,</span> <span class="pre">8&gt;</span></code> is the type corresponding to <span class="math notranslate nohighlight">\(8 \times 8\)</span> blocks of 32-bit integers. Note that there is no preprocessor in Triton-IR, hence parametric shape values must be resolved before programs are generated. In our case, this is done by Triton-JIT’s auto-tuner.</p>
</div>
<div class="section" id="instructions">
<h3>Instructions<a class="headerlink" href="#instructions" title="Permalink to this headline"></a></h3>
<p>Triton-IR introduces a set of <em>reblocking</em> instructions whose purpose is to support broadcasting semantics as described in the previous chapter. The <code class="code docutils literal notranslate"><span class="pre">reshape</span></code> instruction creates a block of the specified shape using the raw data from its input argument. This is particularly useful to re-interpret variables as higher-dimensional arrays by padding their input shapes with ones in preparation for broadcasting. The <code class="code docutils literal notranslate"><span class="pre">broadcast</span></code> instruction creates a block of the specified shapes by replicating its input argument as many times as necessary along dimensions of size 1 – as shown below for the <code class="code docutils literal notranslate"><span class="pre">broadcast&lt;3,3&gt;</span></code> instruction.</p>
<p><a class="reference internal" href="../../_images/broadcast-1.png"><img alt="pic1" src="../../_images/broadcast-1.png" style="width: 40%;" /></a> and <a class="reference internal" href="../../_images/broadcast-2.png"><img alt="pic2" src="../../_images/broadcast-2.png" style="width: 40%;" /></a></p>
<p>Usual scalar instructions (<code class="code docutils literal notranslate"><span class="pre">cmp</span></code>, <code class="code docutils literal notranslate"><span class="pre">getelementptr</span></code>, <code class="code docutils literal notranslate"><span class="pre">add</span></code>, <code class="code docutils literal notranslate"><span class="pre">load</span></code>…) were preserved and extended to signify element-wise operations when applicable. Finally, Triton-IR also exposes specialized arithmetic instructions for reductions (<code class="code docutils literal notranslate"><span class="pre">reduce</span></code>) and matrix multiplications (<code class="code docutils literal notranslate"><span class="pre">dot</span></code>).</p>
</div>
</div>
<div class="section" id="block-level-control-flow-analysis">
<h2>Block-Level Control Flow Analysis<a class="headerlink" href="#block-level-control-flow-analysis" title="Permalink to this headline"></a></h2>
<p>In Triton-IR, operations on block variables are atomic: they execute either in full or not at all. As a result, traditional control flow structures (e.g., conditional, loops) are not applicable to individual block elements. This is problematic, since a program may need to e.g., partially guard blocked loads against memory access violations.</p>
<p>This could be potentially solved through the use of the Predicated SSA (PSSA) <a class="reference internal" href="#carter99" id="id2"><span>[CARTER99]</span></a> <a class="reference internal" href="#stoutchinin01" id="id3"><span>[STOUTCHININ01]</span></a> form for Triton-IR. However, this would create a lot of unnecessary complexity for GPUs, where the benefits of PSSA are close to none as divergent program paths within warps are serialized anyway. Therefore, recent versions of Triton handle intra-block control flow in a much simpler way, using conditional instructions such as <code class="code docutils literal notranslate"><span class="pre">select</span></code>, <code class="code docutils literal notranslate"><span class="pre">masked_load</span></code> and <code class="code docutils literal notranslate"><span class="pre">masked_store</span></code>:</p>
<div class="highlight-C notranslate"><div class="highlight"><pre><span></span><span class="c1">// For all indices [idx], return cond[idx] ? true_value[idx] : false_value[idx];</span>
<span class="n">select</span> <span class="n">TYPE</span><span class="o">&lt;</span><span class="n">TS1</span><span class="p">,</span> <span class="p">...,</span> <span class="n">TSN</span><span class="o">&gt;</span> <span class="n">cond</span><span class="p">,</span> <span class="n">true_value</span><span class="p">,</span> <span class="n">false_value</span><span class="p">;</span>
<span class="c1">// For all indices [idx], return cond[idx] ? *true_addr[idx] : false_value[idx];</span>
<span class="n">masked_load</span> <span class="n">TYPE</span><span class="o">&lt;</span><span class="n">TS1</span><span class="p">,</span> <span class="p">...,</span> <span class="n">TSN</span><span class="o">&gt;</span> <span class="n">cond</span><span class="p">,</span> <span class="n">true_addr</span><span class="p">,</span> <span class="n">false_value</span><span class="p">;</span>
<span class="c1">// For all indices [idx], execute *true_addr[idx] = true_value[idx] if cond[idx]</span>
<span class="n">masked_store</span> <span class="n">TYPE</span><span class="o">&lt;</span><span class="n">TS1</span><span class="p">,</span> <span class="p">...,</span> <span class="n">TSN</span><span class="o">&gt;</span> <span class="n">cond</span><span class="p">,</span> <span class="n">true_addr</span><span class="p">,</span> <span class="n">true_value</span><span class="p">;</span>
</pre></div>
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<h2>References<a class="headerlink" href="#references" title="Permalink to this headline"></a></h2>
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<dt class="label" id="braun13"><span class="brackets"><a class="fn-backref" href="#id1">BRAUN13</a></span></dt>
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<li><p>Braun et al., “Simple and Efficient Construction of Static Single Assignment Form”, CC 2013</p></li>
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<dt class="label" id="carter99"><span class="brackets"><a class="fn-backref" href="#id2">CARTER99</a></span></dt>
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<li><p>Carter et al., “Predicated Static Single Assignment”, PACT 1999</p></li>
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<dt class="label" id="stoutchinin01"><span class="brackets"><a class="fn-backref" href="#id3">STOUTCHININ01</a></span></dt>
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<li><p>Stoutchinin et al., “Efficient Static Single Assignment Form for Predication”, MICRO 2001</p></li>
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