[Backend] Use post-order traversal for liveness numbering (#1027)
Also add tests for `tt.trans`.
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@@ -25,13 +25,14 @@ ChangeResult SharedMemoryAliasAnalysis::visitOperation(
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if (maybeSharedAllocationOp(op)) {
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// These ops may allocate a new shared memory buffer.
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auto result = op->getResult(0);
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// FIXME(Keren): extract and insert are always alias for now
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// XXX(Keren): the following ops are always aliasing for now
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if (isa<tensor::ExtractSliceOp, triton::TransOp>(op)) {
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// extract_slice %src
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// trans %src
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aliasInfo = AliasInfo(operands[0]->getValue());
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pessimistic = false;
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} else if (isa<tensor::InsertSliceOp>(op) ||
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isa<triton::gpu::InsertSliceAsyncOp>(op)) {
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} else if (isa<tensor::InsertSliceOp, triton::gpu::InsertSliceAsyncOp>(
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op)) {
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// insert_slice_async %src, %dst, %index
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// insert_slice %src into %dst[%offsets]
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aliasInfo = AliasInfo(operands[1]->getValue());
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@@ -298,10 +298,24 @@ private:
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/// Resolves liveness of all values involved under the root operation.
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void resolveLiveness() {
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// In the SCF dialect, we always have a sequentially nested structure of
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// blocks
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// Assign an ID to each operation using post-order traversal.
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// To achieve the correct liveness range, the parent operation's ID
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// should be greater than each of its child operation's ID .
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// Example:
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// ...
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// %5 = triton.convert_layout %4
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// %6 = scf.for ... iter_args(%arg0 = %0) -> (i32) {
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// %2 = triton.convert_layout %5
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// ...
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// scf.yield %arg0
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// }
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// For example, %5 is defined in the parent region and used in
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// the child region, and is not passed as a block argument.
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// %6 should should have an ID greater than its child operations,
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// otherwise %5 liveness range ends before the child operation's liveness
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// range ends.
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DenseMap<Operation *, size_t> operationId;
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operation->walk<WalkOrder::PreOrder>(
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operation->walk<WalkOrder::PostOrder>(
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[&](Operation *op) { operationId[op] = operationId.size(); });
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// Analyze liveness of explicit buffers
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