[CI] run clang-format (#24)
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@@ -5,7 +5,6 @@
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using namespace mlir;
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#define GEN_PASS_CLASSES
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#include "triton/Dialect/TritonGPU/Transforms/Passes.h.inc"
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@@ -37,28 +36,30 @@ private:
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if (!encoding.isa<triton::gpu::TritonGPUSharedEncodingAttr>())
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return dotOp.emitError() << name << " should be of shared layout";
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} else
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return dotOp.emitError() << name << "'s type should be of RankedTensorType";
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return dotOp.emitError()
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<< name << "'s type should be of RankedTensorType";
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}
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Attribute cLayout;
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for (auto it : llvm::zip(llvm::SmallVector<Type>{cType, dType},
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llvm::SmallVector<char>{'c', 'd'})) {
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llvm::SmallVector<char>{'c', 'd'})) {
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Type type = std::get<0>(it);
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char name = std::get<1>(it);
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if (auto tensorType = type.dyn_cast<RankedTensorType>()) {
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Attribute encoding = tensorType.getEncoding();
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if (!encoding)
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return dotOp.emitError() << name << " should have encoding";
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if (!encoding.isa<triton::gpu::TritonGPUMmaEncodingAttr>() &&
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if (!encoding.isa<triton::gpu::TritonGPUMmaEncodingAttr>() &&
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!encoding.isa<triton::gpu::TritonGPUBlockedEncodingAttr>())
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return dotOp.emitError() << name << " should be of distributed layout";
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return dotOp.emitError()
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<< name << " should be of distributed layout";
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if (name == 'c')
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cLayout = encoding;
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else if (encoding != cLayout)
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return dotOp.emitError() << "d & c should have the same layout";
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} else
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return dotOp.emitError() << name
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<< "'s type should be of RankedTensorType";
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return dotOp.emitError()
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<< name << "'s type should be of RankedTensorType";
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}
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// signalPassFailure();
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@@ -89,7 +90,7 @@ private:
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}
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void verifyImpl(Operation *op) {
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if(verifySingleOp(op).failed())
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if (verifySingleOp(op).failed())
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signalPassFailure();
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// verify that all child regions are ok
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