[GENERAL] Removed deprecated driver files and added basic compatibility with rocm (#268)
- Removed driver module -- accelerator runtime is handled by pytorch - Added basic support for ROCM based on @micmelesse 's PR -- now can execute empty kernel on AMD devices without any compile-time changes - Now only using PREFER_SHARED for kernels when the size of shared memory is greater than 49k. Otherwise there can be poor L1 performance for broadcast tensors
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@@ -13,45 +13,40 @@
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#include "triton/codegen/transform/peephole.h"
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#include "triton/codegen/transform/pipeline.h"
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#include "triton/codegen/transform/prefetch.h"
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#include "triton/driver/device.h"
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#include "triton/driver/kernel.h"
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#include "triton/driver/module.h"
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#include "triton/ir/function.h"
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#include "triton/ir/module.h"
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#include "triton/ir/print.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/LegacyPassManager.h"
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#include "llvm/IR/Verifier.h"
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namespace triton {
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namespace codegen {
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// TODO:
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// There should be a proper pass manager there!
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void add_passes_to_emit_bin(ir::module &ir, driver::device *dev, int num_warps, int num_stages, bool force_nc_cache,
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driver::module *&mod, driver::kernel *&ker, size_t &shared_mem) {
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std::unique_ptr<llvm::Module> add_passes_to_emit_bin(ir::module &ir, llvm::LLVMContext& ctx, codegen::target* target,
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int cc, int num_warps, int num_stages, bool force_nc_cache, int& shared_static) {
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// generate llvm code
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llvm::LLVMContext ctx;
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std::string name = ir.get_function_list()[0]->get_name();
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std::unique_ptr<llvm::Module> llvm(new llvm::Module(name, ctx));
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// optimizations
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std::unique_ptr<codegen::target> target = dev->make_target();
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bool cts_use_async = target->as_nvidia()->sm() >= 80;
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bool cts_use_async = target->as_nvidia() && target->as_nvidia()->sm() >= 80;
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// create passes
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codegen::analysis::align align;
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codegen::analysis::axes axes;
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codegen::transform::cts cts(cts_use_async);
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codegen::transform::pipeline pipeline(cts_use_async, num_stages);
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codegen::transform::disassociate disassociate;
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codegen::analysis::layouts layouts(&axes, &align, num_warps, target.get());
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codegen::analysis::layouts layouts(&axes, &align, num_warps, target);
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codegen::analysis::liveness liveness(&layouts);
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codegen::analysis::swizzle swizzle(&layouts, target.get());
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codegen::analysis::swizzle swizzle(&layouts, target);
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codegen::analysis::allocation allocation(&liveness);
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codegen::transform::dce dce;
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codegen::transform::peephole peephole(target.get(), &layouts);
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// codegen::transform::reassociate reassociate;
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codegen::transform::peephole peephole(target, &layouts);
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codegen::transform::coalesce coalesce(&align, &layouts);
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codegen::transform::prefetch prefetch_s(target.get());
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codegen::transform::membar barriers(&liveness, &layouts, &allocation, &prefetch_s, target.get());
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codegen::generator isel(&axes, &layouts, &align, &allocation, &swizzle, target.get(), num_warps, force_nc_cache);
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codegen::transform::prefetch prefetch_s(target);
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codegen::transform::membar barriers(&liveness, &layouts, &allocation, &prefetch_s, target);
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codegen::generator isel(&axes, &layouts, &align, &allocation, &swizzle, target, num_warps, force_nc_cache);
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// run passes
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dce.run(ir);
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peephole.run(ir);
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@@ -72,15 +67,12 @@ void add_passes_to_emit_bin(ir::module &ir, driver::device *dev, int num_warps,
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layouts.run(ir);
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coalesce.run(ir);
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dce.run(ir);
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// exit(1);
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align.run(ir);
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dce.run(ir);
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if (target->is_gpu())
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cts.run(ir);
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dce.run(ir);
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align.run(ir);
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// ir::print(ir, std::cout);
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axes.run(ir);
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layouts.run(ir);
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peephole.run(ir);
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@@ -93,11 +85,9 @@ void add_passes_to_emit_bin(ir::module &ir, driver::device *dev, int num_warps,
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allocation.run(ir);
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prefetch_s.run(ir);
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barriers.run(ir);
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// ir.print(std::cout);
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isel.visit(ir, *llvm);
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mod = driver::module::create(dev, std::move(llvm));
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ker = driver::kernel::create(&*mod, name.c_str());
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shared_mem = allocation.allocated_size();
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shared_static = allocation.allocated_size();
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return llvm;
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}
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} // namespace codegen
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