[BACKEND] Memory allocation (#33)
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@@ -1,5 +1,6 @@
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add_mlir_library(TritonTestAnalysis
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TestAxisInfo.cpp
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TestAllocation.cpp
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LINK_LIBS PUBLIC
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TritonAnalysis
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49
test/lib/Analysis/TestAllocation.cpp
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49
test/lib/Analysis/TestAllocation.cpp
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@@ -0,0 +1,49 @@
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#include "mlir/Pass/Pass.h"
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#include "triton/Analysis/Allocation.h"
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using namespace mlir;
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namespace {
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struct TestAllocationPass
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: public PassWrapper<TestAllocationPass, OperationPass<FuncOp>> {
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// LLVM15+
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// MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestAllocationPass);
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StringRef getArgument() const final { return "test-print-allocation"; }
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StringRef getDescription() const final {
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return "print the result of the allocation pass";
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}
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void runOnOperation() override {
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Operation *operation = getOperation();
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auto &os = llvm::errs();
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os << "Testing: " << operation->getName() << "\n";
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AllocationAnalysis analysis(operation);
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operation->walk([&](Operation *op) {
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if (op->getNumResults() < 1)
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return;
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for (Value result : op->getResults()) {
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Type type = result.getType();
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if (auto tensorType = type.dyn_cast<RankedTensorType>()) {
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Attribute encoding = tensorType.getEncoding();
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if (encoding.isa<triton::gpu::TritonGPUSharedEncodingAttr>()) {
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size_t offset = analysis.getOffset(result);
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size_t size = analysis.getAllocatedSize(result);
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os << "offset = " << offset << ", size = " << size << "\n";
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}
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}
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}
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});
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os << "size = " << analysis.getSharedMemorySize() << "\n";
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}
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};
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} // namespace
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namespace mlir {
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namespace test {
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void registerTestAllocationPass() { PassRegistration<TestAllocationPass>(); }
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} // namespace test
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} // namespace mlir
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