More on the pipeline pass
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@@ -3,7 +3,7 @@
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include "mlir/Pass/PassBase.td"
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def TritonGPUPipeline : Pass<"tritongpu-pipeline", "mlir::FuncOp"> {
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def TritonGPUPipeline : Pass<"tritongpu-pipeline", "mlir::ModuleOp"> {
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let summary = "pipeline";
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let description = [{
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@@ -7,10 +7,102 @@ using namespace mlir;
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#include "triton/Dialect/TritonGPU/Transforms/Passes.h.inc"
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namespace {
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class LoopPipeliner {
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struct PipelineInfo {
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triton::DotOp dotOp;
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triton::LoadOp aLoadOp;
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triton::LoadOp bLoadOp;
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};
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int numStages;
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/// cache forOp we are working on
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scf::ForOp forOp;
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/// dot & loads
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PipelineInfo info;
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/// value (in loop) => value at stage N
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DenseMap<Value, SmallVector<Value>> valueMapping;
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void setStageValueMapping(Value origin, Value prefetched, int idx);
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public:
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LoopPipeliner(scf::ForOp forOp, int numStages)
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: forOp(forOp), numStages(numStages) {}
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/// Collect loop info. Return success if we can pipeline this loop
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LogicalResult initialize();
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///
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void emitPrologue();
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friend class PipelinePass;
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};
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/// A load instruction can be pipelined if:
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/// - the pointer is a block argument (redefined inside the loop)
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/// - the load has only a single use in a dot instruction
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LogicalResult LoopPipeliner::initialize() {
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Region &bodyRegion = forOp.getLoopBody();
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assert(bodyRegion.hasOneBlock());
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Block &loop = bodyRegion.front();
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// TODO: can we use forOp.walk(...) here?
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SmallVector<triton::DotOp, 2> dots;
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for (Operation &op : loop) {
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if (auto dotOp = dyn_cast<triton::DotOp>(&op)) {
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dots.push_back(dotOp);
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}
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}
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// Don't know what to do if we have more than 1 dots inside the loop
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if (dots.size() != 1)
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return failure();
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triton::DotOp dotOp = dots[0];
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// dot (cvt (load %ptr0)), (cvt (load %ptr1))
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auto getDefinintLoad = [&](Value v) -> triton::LoadOp {
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auto cvt = v.getDefiningOp<triton::gpu::ConvertLayoutOp>();
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if (cvt) {
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return cvt.src().getDefiningOp<triton::LoadOp>();
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}
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return nullptr;
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};
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auto aLoad = getDefinintLoad(dotOp.a());
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auto bLoad = getDefinintLoad(dotOp.b());
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// ptrs must be block args (phi nodes)
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if (aLoad && bLoad) {
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if (aLoad.ptr().isa<BlockArgument>() && bLoad.ptr().isa<BlockArgument>()) {
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info.dotOp = dotOp; info.aLoadOp = aLoad; info.bLoadOp = bLoad;
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return success();
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}
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}
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return failure();
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}
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void LoopPipeliner::emitPrologue() {
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OpBuilder builder(forOp);
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//
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}
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// ref: mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
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struct PipelinePass : public TritonGPUPipelineBase<PipelinePass> {
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void runOnOperation() override {
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getOperation()->walk([&](scf::ForOp forOp) {
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// TODO: collect numStages from ModuleOp
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int numStages = 2;
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if (numStages <= 1)
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return;
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getOperation()->walk([&](scf::ForOp forOp) -> void {
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LoopPipeliner pipeliner(forOp, numStages);
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if (pipeliner.initialize().failed())
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return;
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llvm::errs() << "candidate for pipelining: " << pipeliner.info.dotOp
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<< "\n";
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// pipeliner.emitPrologue();
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});
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}
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};
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@@ -16,6 +16,7 @@
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#include "triton/Dialect/Triton/IR/Dialect.h"
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#include "triton/Dialect/Triton/IR/Types.h"
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#include "triton/Dialect/Triton/Transforms/Passes.h"
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#include "triton/Dialect/TritonGPU/Transforms/Passes.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/LegacyPassManager.h"
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@@ -1340,6 +1341,9 @@ void init_triton_ir(py::module &&m) {
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.def("add_convert_triton_to_tritongpu_pass", [](mlir::PassManager &self) {
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self.addPass(mlir::triton::createConvertTritonToTritonGPUPass());
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})
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.def("add_tritongpu_pipeline_pass", [](mlir::PassManager &self) {
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self.addPass(mlir::createTritonGPUPipelinePass());
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})
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;
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}
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@@ -1314,6 +1314,7 @@ class JITFunction:
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pm.add_triton_combine_pass()
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pm.add_canonicalizer_pass()
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pm.add_convert_triton_to_tritongpu_pass()
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pm.add_tritongpu_pipeline_pass()
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pm.run(mod)
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return mod
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