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This commit is contained in:
@@ -72,24 +72,24 @@ void storeDistributedToShared(Value src, Value llSrc,
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Value staIdx1 = i32_val(0);
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Value stride0 = dstStrides[outOrd[0]];
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Value stride1 = dstStrides[outOrd[1]];
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// if (auto addOp = dyn_cast<LLVM::AddOp>(dynIdx0.getDefiningOp()))
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// if (auto cstRhs =
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// dyn_cast<LLVM::ConstantOp>(addOp.getRhs().getDefiningOp())) {
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// unsigned rhsVal =
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// cstRhs.getValue().cast<IntegerAttr>().getValue().getSExtValue();
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// unsigned key = (rhsVal / outVec) % maxPhase;
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// if (cache.find(key) == cache.end())
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// cache[key] = dynIdx0;
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// dynIdx0 = cache[key];
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// staIdx0 =
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// i32_val((rhsVal) / (outVec * maxPhase) * (outVec * maxPhase));
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// }
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// if (auto addOp = dyn_cast<LLVM::AddOp>(dynIdx1.getDefiningOp()))
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// if (auto cstRhs =
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// dyn_cast<LLVM::ConstantOp>(addOp.getRhs().getDefiningOp())) {
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// dynIdx1 = addOp.getLhs();
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// staIdx1 = addOp.getRhs();
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// }
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if (auto addOp = dyn_cast<LLVM::AddOp>(dynIdx0.getDefiningOp()))
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if (auto cstRhs =
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dyn_cast<LLVM::ConstantOp>(addOp.getRhs().getDefiningOp())) {
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unsigned rhsVal =
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cstRhs.getValue().cast<IntegerAttr>().getValue().getSExtValue();
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unsigned key = (rhsVal / outVec) % maxPhase;
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if (cache.find(key) == cache.end())
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cache[key] = dynIdx0;
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dynIdx0 = cache[key];
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staIdx0 =
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i32_val((rhsVal) / (outVec * maxPhase) * (outVec * maxPhase));
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}
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if (auto addOp = dyn_cast<LLVM::AddOp>(dynIdx1.getDefiningOp()))
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if (auto cstRhs =
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dyn_cast<LLVM::ConstantOp>(addOp.getRhs().getDefiningOp())) {
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dynIdx1 = addOp.getLhs();
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staIdx1 = addOp.getRhs();
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}
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// offset along non-contiguous dimension
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Value off1 = mul(dynIdx1, stride1);
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@@ -1266,14 +1266,16 @@ public:
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: mlir::RewritePattern(triton::gpu::ConvertLayoutOp::getOperationName(),
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1, context) {}
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LogicalResult matchAndRewrite(mlir::Operation* op,
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mlir::PatternRewriter &rewriter) const override {
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LogicalResult
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matchAndRewrite(mlir::Operation *op,
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mlir::PatternRewriter &rewriter) const override {
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auto dstOp = cast<triton::gpu::ConvertLayoutOp>(op);
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auto tmpOp = dyn_cast_or_null<triton::TransOp>(dstOp.src().getDefiningOp());
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if(!tmpOp)
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if (!tmpOp)
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return mlir::failure();
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auto srcOp = dyn_cast_or_null<triton::gpu::ConvertLayoutOp>(tmpOp.src().getDefiningOp());
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if(!srcOp)
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auto srcOp = dyn_cast_or_null<triton::gpu::ConvertLayoutOp>(
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tmpOp.src().getDefiningOp());
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if (!srcOp)
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return mlir::failure();
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auto arg = srcOp.src();
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auto X = tmpOp.src();
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@@ -1285,25 +1287,74 @@ public:
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auto ZType = dstOp.getResult().getType().cast<RankedTensorType>();
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// encodings
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auto argEncoding = argType.getEncoding();
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auto XEncoding = XType.getEncoding().cast<triton::gpu::SharedEncodingAttr>();
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auto YEncoding = YType.getEncoding().cast<triton::gpu::SharedEncodingAttr>();
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auto ZEncoding = ZType.getEncoding().dyn_cast<triton::gpu::DotOperandEncodingAttr>();
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if(!ZEncoding)
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auto XEncoding =
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XType.getEncoding().cast<triton::gpu::SharedEncodingAttr>();
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auto YEncoding =
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YType.getEncoding().cast<triton::gpu::SharedEncodingAttr>();
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auto ZEncoding =
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ZType.getEncoding().dyn_cast<triton::gpu::DotOperandEncodingAttr>();
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if (!ZEncoding)
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return mlir::failure();
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// new X encoding
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auto newXOrder = triton::gpu::getOrder(argEncoding);
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auto newXEncoding = triton::gpu::SharedEncodingAttr::get(
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getContext(), ZEncoding, XType.getShape(), newXOrder,
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XType.getElementType());
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auto newXType = RankedTensorType::get(XType.getShape(), XType.getElementType(),
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newXEncoding);
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if(XEncoding == newXEncoding)
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auto newXType = RankedTensorType::get(XType.getShape(),
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XType.getElementType(), newXEncoding);
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if (XEncoding == newXEncoding)
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return mlir::failure();
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auto newX = rewriter.create<triton::gpu::ConvertLayoutOp>(srcOp.getLoc(), newXType, arg);
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auto newX = rewriter.create<triton::gpu::ConvertLayoutOp>(srcOp.getLoc(),
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newXType, arg);
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auto newY = rewriter.create<triton::TransOp>(tmpOp.getLoc(), newX);
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rewriter.replaceOpWithNewOp<triton::gpu::ConvertLayoutOp>(dstOp, ZType, newY);
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rewriter.replaceOpWithNewOp<triton::gpu::ConvertLayoutOp>(dstOp, ZType,
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newY);
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return mlir::success();
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}
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};
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//
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class ConvertDotConvert : public mlir::RewritePattern {
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public:
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ConvertDotConvert(mlir::MLIRContext *context)
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: mlir::RewritePattern(triton::gpu::ConvertLayoutOp::getOperationName(),
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1, context) {}
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LogicalResult
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matchAndRewrite(mlir::Operation *op,
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mlir::PatternRewriter &rewriter) const override {
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auto dstOp = cast<triton::gpu::ConvertLayoutOp>(op);
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auto dotOp = dyn_cast_or_null<triton::DotOp>(dstOp.src().getDefiningOp());
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if (!dotOp)
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return mlir::failure();
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if (std::distance(dstOp->user_begin(), dstOp->user_end()) != 1 ||
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std::distance(dotOp->user_begin(), dotOp->user_end()) != 1)
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return mlir::failure();
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auto cvtOp = dyn_cast_or_null<triton::gpu::ConvertLayoutOp>(
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dotOp.getOperand(2).getDefiningOp());
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if (!cvtOp)
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return mlir::failure();
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auto loadOp = dyn_cast_or_null<triton::LoadOp>(cvtOp.src().getDefiningOp());
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if (!loadOp)
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return mlir::failure();
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auto dstTy = dstOp.getResult().getType().cast<RankedTensorType>();
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auto srcTy = cvtOp.getOperand().getType().cast<RankedTensorType>();
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if (dstTy != srcTy)
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return mlir::failure();
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// TODO: int tensor cores
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auto _0f = rewriter.create<arith::ConstantFloatOp>(
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op->getLoc(), APFloat(0.0f), dstTy.getElementType().cast<FloatType>());
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auto _0 = rewriter.create<triton::SplatOp>(
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op->getLoc(), dotOp.getResult().getType(), _0f);
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auto newDot = rewriter.create<triton::DotOp>(
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op->getLoc(), dotOp.getResult().getType(), dotOp.getOperand(0),
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dotOp.getOperand(1), _0, dotOp.allowTF32());
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auto newCvt = rewriter.create<triton::gpu::ConvertLayoutOp>(
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op->getLoc(), dstTy, newDot.getResult());
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auto newAdd = rewriter.replaceOpWithNewOp<arith::AddFOp>(
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op, newCvt, cvtOp.getOperand());
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return mlir::success();
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}
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};
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@@ -1477,6 +1528,7 @@ public:
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patterns.add<MoveConvertOutOfIf>(context);
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patterns.add<BlockedToMMA>(context, computeCapability);
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patterns.add<ConvertTransConvert>(context);
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patterns.add<ConvertDotConvert>(context);
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if (applyPatternsAndFoldGreedily(m, std::move(patterns)).failed()) {
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signalPassFailure();
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@@ -148,7 +148,7 @@ module attributes {"triton_gpu.num-warps" = 8 : i32} {
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%136 = triton_gpu.convert_layout %60 : (tensor<128x64xf16, #shared0>) -> tensor<128x64xf16, #triton_gpu.dot_op<{opIdx = 1, parent = #mma1}>>
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%137 = tt.dot %135, %136, %134 {allowTF32 = true} : tensor<128x128xf16, #triton_gpu.dot_op<{opIdx = 0, parent = #mma1}>> * tensor<128x64xf16, #triton_gpu.dot_op<{opIdx = 1, parent = #mma1}>> -> tensor<128x64xf32, #mma1>
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%138 = triton_gpu.convert_layout %137 : (tensor<128x64xf32, #mma1>) -> tensor<128x64xf32, #blocked2>
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tt.store %arg29, %138 : tensor<128x64xf32, #blocked2>
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tt.store %arg29, %133 : tensor<128x64xf32, #blocked2>
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%139 = tt.addptr %arg29, %43 : tensor<128x64x!tt.ptr<f32>, #blocked2>, tensor<128x64xi32, #blocked2>
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%140 = tt.addptr %arg30, %42 : tensor<128x64x!tt.ptr<f16>, #blocked1>, tensor<128x64xi32, #blocked1>
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%141 = tt.addptr %arg31, %42 : tensor<128x64x!tt.ptr<f16>, #blocked1>, tensor<128x64xi32, #blocked1>
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@@ -191,6 +191,7 @@ def _bwd_kernel(
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tl.store(dv_ptrs, dv)
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tl.store(dk_ptrs, dk)
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# _bwd_kernel = triton.compile("./slow.ttgir", num_warps=8)
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# _bwd_kernel = triton.compile("./unoptimized.ttgir", num_warps=8)
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# _bwd_kernel = triton.compile("./bwd.ttgir", num_warps=8)
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@@ -260,7 +261,7 @@ class _attention(torch.autograd.Function):
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BLOCK_M=ctx.BLOCK, D_HEAD=ctx.BLOCK_DMODEL,
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)
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# _bwd_kernel[(ctx.grid[1],1,1)](
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# _bwd_kernel[(ctx.grid[1], 1, 1)](
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# q.data_ptr(), k.data_ptr(), v.data_ptr(), ctx.sm_scale,
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# o.data_ptr(), do_scaled.data_ptr(),
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# dq.data_ptr(), dk.data_ptr(), dv.data_ptr(),
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