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Author	SHA1	Message	Date
Keren Zhou	16aed94ff5	[Analysis/Allocation] Allocation passes now assumes that slices always alias (#108 ) This code in this branch assumes the `src` operand in `insert_slice_async` always aliases the result, which shouldn't hold for generally cases but is just a workaround to make the pipeline pass work. I'm also working on the complete analysis in another [branch](https://github.com/openai/triton-mlir/tree/keren/analyze-slice).	2022-09-09 12:03:41 -07:00
Keren Zhou	e0bedeb44c	[BACKEND] Keren/shared memory barrier (#59 )	2022-08-18 12:32:57 -07:00

Author

SHA1

Message

Date

Keren Zhou

16aed94ff5

[Analysis/Allocation] Allocation passes now assumes that slices always alias (#108 )

This code in this branch assumes the `src` operand in
`insert_slice_async` always aliases the result, which shouldn't hold for
generally cases but is just a workaround to make the pipeline pass work.

I'm also working on the complete analysis in another
[branch](https://github.com/openai/triton-mlir/tree/keren/analyze-slice).

2022-09-09 12:03:41 -07:00

Keren Zhou

e0bedeb44c

[BACKEND] Keren/shared memory barrier (#59 )

2022-08-18 12:32:57 -07:00

2 Commits