This PR does - fix some bugs to support masked load/store, - refine frontend, and support the `and` and `or` syntax in mask(by extending the BoolOp in python ast.visitor), e.g. `tl.store(..., mask=offset<n and other_conditions)`, - add `arith.cmpI` and `arith.cmpF` op conversion in backend(required by mask), - add more test cases in vecadd.
48 lines
1.6 KiB
Python
48 lines
1.6 KiB
Python
import pytest
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import torch
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from torch.testing import assert_close
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import triton
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import triton.language as tl
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@triton.jit
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def kernel(x_ptr, stride_xm,
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z_ptr, stride_zn,
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SIZE_M: tl.constexpr, SIZE_N: tl.constexpr):
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off_m = tl.arange(0, SIZE_M)
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off_n = tl.arange(0, SIZE_N)
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Xs = x_ptr + off_m[:, None] * stride_xm + off_n[None, :] * 1
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Zs = z_ptr + off_m[:, None] * 1 + off_n[None, :] * stride_zn
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tl.store(Zs, tl.load(Xs))
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# These sizes cover the case of:
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# - blocked layout and sliced layout with block parent
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# -- blocked layout in which sizePerThread/threadsPerWarp/warpsPerCTA
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# need/need not to be wrapped
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# -- sliced layout incase sizePerThread need to be wrapped
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# -- different orders
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# - LayoutConversion from blocked -> blocked
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# - tt.Broadcast which requires for broadcast in either/both of
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# CTA/perThread level
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# What is not covered and requires for TODO:
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# - vectorization load/store of shared memory
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# - multiple replication of layout conversion
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@pytest.mark.parametrize('NUM_WARPS,SIZE_M,SIZE_N', [
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[1, 16, 16],
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[1, 32, 32],
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[1, 32, 64],
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[2, 64, 128],
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[2, 128, 64]
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])
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def test_convert_layout_impl(NUM_WARPS, SIZE_M, SIZE_N):
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grid = lambda META: (1, )
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x = torch.randn((SIZE_M, SIZE_N), device='cuda', dtype=torch.float32)
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z = torch.empty((SIZE_N, SIZE_M), device=x.device, dtype=x.dtype)
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kernel[grid](x_ptr=x, stride_xm=x.stride(0), z_ptr=z, stride_zn=z.stride(0), SIZE_M=SIZE_M, SIZE_N=SIZE_N, num_warps=NUM_WARPS)
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golden_z = torch.t(x)
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assert_close(z, golden_z, rtol=1e-7, atol=1e-7, check_dtype=False)
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