840140bf26
This massively simplifies implementation of `reassociate` and also fixes a bunch of bug. The pass could still be improved, but can already be used to generate constant pointer offsets in eg the matmul epilogue
264 lines
9.9 KiB
Python
264 lines
9.9 KiB
Python
"""
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Matrix Multiplication
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======================
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In this tutorial, you will write a 25-lines high-performance matrix multiplication kernel that achieves close to peak performance on modern GPUs.
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You will specifically learn about:
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- Block-level matrix multiplications
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- Multi-dimensional pointer arithmetic
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- Program re-ordering for improved L2 cache hit rate
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- Automatic performance tuning
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"""
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# %%
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# Motivations
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# -------------
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# Matrix multiplications are a key building block of most modern high-performance computing systems.
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# They are notoriously hard to optimize, hence their implementation is typically done by hardware vendors themselves as part of so-called "kernel libraries" (e.g., cuBLAS).
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# Unfortunately, these libraries are often proprietary and cannot be easily customized to accomodate the needs of modern deep learning workloads (e.g., mixture of experts, fused activation functions, etc.).
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# For this reason, this tutorial will show you how to implement efficient matrix multiplications yourself with Triton, in a way that is easy to customize and extend.
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#
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# Roughly speaking, the kernel that we will write will implement the following blocked algorithm:
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#
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# .. code-block:: python
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#
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# # do in parallel
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# for m in range(0, M, BLOCK_M):
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# # do in parallel
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# for n in range(0, N, BLOCK_N):
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# acc = zeros((BLOCK_M, BLOCK_N), dtype=float32)
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# for k in range(0, K, BLOCK_K):
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# a = A[m : m+BLOCK_M, k : k+BLOCK_K]
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# b = B[k : k+BLOCK_K, n : n+BLOCK_N]
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# acc += dot(a, b)
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# C[m : m+BLOCK_M, n : n+BLOCK_N] = acc;
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#
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# where each iteration of the doubly-nested for-loop corresponds to a Triton program instance.
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# %%
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# Compute Kernel
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# ----------------
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#
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# The above algorithm is actually fairly straightforward to implement in Triton.
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# The main difficulty comes from the 2D pointer arithmetic that must be done to specify the memory locations for the blocks of :code:`A` and :code:`B` that we need to read in the inner loop.
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#
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# Pointer Arithmetics
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# ~~~~~~~~~~~~~~~~~~~~
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#
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# For a row-major 2D tensor :code:`X`, the memory location of :code:`X[i, j]` is given by :code:`&X[i, j] = X + i*stride_x_0 + j*stride_x_1`.
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# Therefore, blocks of pointers for :code:`A[m : m+BLOCK_M, k:k+BLOCK_K]` and :code:`B[k : k+BLOCK_K, n : n+BLOCK_N]` can be defined in pseudo-code as:
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#
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# .. code-block:: python
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#
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# &A[m : m+BLOCK_M, k:k+BLOCK_K] = A + (m : m+BLOCK_M)[:, None]*A.stride(0) + (k : k+BLOCK_K)[None, :];
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# &B[k : k+BLOCK_K, n:n+BLOCK_N] = B + (k : k+BLOCK_K)[:, None]*B.stride(0) + (n : n+BLOCK_N)[None, :];
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#
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# Which means that, at initialization (i.e., :code:`k = 0`), pointers for blocks of A and B can be initialized in Triton as:
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#
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# .. code-block:: python
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#
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# pid_m = triton.program_id(0)
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# pid_n = triton.program_id(1)
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# rm = pid_m * BLOCK_M + triton.arange(0, BLOCK_M)
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# rn = pid_n * BLOCK_N + triton.arange(0, BLOCK_N)
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# rk = triton.arange(0, BLOCK_K)
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# // pointer for A operand
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# pa = A + (rm[:, None] * stride_a_0 + rk[None, :] * stride_a_1);
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# // pointer for B operand
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# pb = B + (rk[:, None] * stride_b_0 + rn[None, :] * stride_b_1);
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#
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# These pointers can then be updated in the inner loop as:
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#
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# .. code-block:: python
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#
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# pa += BLOCK_K * stride_a_1;
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# pb += BLOCK_K * stride_b_0;
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#
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#
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# L2 Cache Optimizations
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# ~~~~~~~~~~~~~~~~~~~~~~~~
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#
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# As mentioned above, each program instance computes an :code:`[BLOCK_M, BLOCK_N]` block of :code:`C`.
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# However, the order in which these blocks are computer matters, since it affects the L2 cache hit rate of our program.
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# This means that a naive row-major ordering:
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#
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# .. code-block:: Python
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#
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# pid = triton.program_id(0);
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# grid_m = (M + BLOCK_M - 1) // BLOCK_M;
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# grid_n = (N + BLOCK_N - 1) // BLOCK_N;
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# pid_m = pid / grid_n;
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# pid_n = pid % grid_n;
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#
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# is unlikely to result in optimal performance.
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#
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# One possible solution is to launch blocks in an order that promotes data reuse.
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# This can be done by 'super-grouping' blocks in groups of :code:`GROUP_M` rows before switching to the next column:
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#
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# .. code-block:: python
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#
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# pid = triton.program_id(0);
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# width = GROUP_M * grid_n;
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# group_id = pid // width;
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# # we need to handle the case where M % (GROUP_M*BLOCK_M) != 0
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# group_size = min(grid_m - group_id * GROUP_M, GROUP_M);
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# pid_m = group_id * GROUP_M + (pid % group_size);
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# pid_n = (pid % width) // (group_size);
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#
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# In practice, this can improve the performance of our matrix multiplication kernel by >10\% on some hardware architecture (e.g., 220 to 245 TFLOPS on A100).
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#
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# %%
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# Final Result
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# -------------
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#
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import torch
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import triton
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import triton.language as tl
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# %
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# :code:`triton.jit`'ed functions can be auto-tuned by using the `triton.autotune` decorator, which consumes:
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# - A list of :code:`triton.Config` objects that define different configurations of meta-parameters (e.g., BLOCK_M) and compilation options (e.g., num_warps) to try
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# - A autotuning *key* whose change in values will trigger evaluation of all the provided configs
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@triton.jit
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def sigmoid(x):
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ret_true = 1 / (1 + tl.exp(-x))
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ret_false = tl.exp(x) / (1 + tl.exp(x))
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return tl.where(x >= 0, ret_true, ret_false)
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@triton.jit
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def swish(x):
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return x * sigmoid(x)
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@triton.autotune(
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configs=[
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triton.Config({'BLOCK_M': 128, 'BLOCK_N': 128, 'BLOCK_K': 64, 'GROUP_M': 8}, num_warps=4),
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#triton.Config({'BLOCK_M': 64, 'BLOCK_N': 128, 'BLOCK_K': 32, 'GROUP_M': 8}, num_warps=4),
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],
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key=['M', 'N', 'K'],
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)
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# %
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# We can now define our kernel as normal, using all the techniques presented above
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@triton.jit
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def _matmul(A, B, C, M, N, K, stride_am, stride_ak, stride_bk, stride_bn, stride_cm, stride_cn, **META):
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# extract meta-parameters
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BLOCK_M = META['BLOCK_M']
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BLOCK_N = META['BLOCK_N']
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BLOCK_K = META['BLOCK_K']
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GROUP_M = 8
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# matrix multiplication
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pid = tl.program_id(0)
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grid_m = (M + BLOCK_M - 1) // BLOCK_M
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grid_n = (N + BLOCK_N - 1) // BLOCK_N
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# re-order program ID for better L2 performance
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width = GROUP_M * grid_n
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group_id = pid // width
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group_size = min(grid_m - group_id * GROUP_M, GROUP_M)
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pid_m = group_id * GROUP_M + (pid % group_size)
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pid_n = (pid % width) // (group_size)
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# do matrix multiplication
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rm = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
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rn = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
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rk = tl.arange(0, BLOCK_K)
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A = A + (rm[:, None] * stride_am + rk[None, :] * stride_ak)
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B = B + (rk[:, None] * stride_bk + rn[None, :] * stride_bn)
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acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)
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for k in range(K, 0, -BLOCK_K):
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a = tl.load(A)
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b = tl.load(B)
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acc += tl.dot(a, b)
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A += BLOCK_K * stride_ak
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B += BLOCK_K * stride_bk
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# triton can accept arbitrary activation function
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# via metaparameters!
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if META['ACTIVATION']:
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acc = META['ACTIVATION'](acc)
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# rematerialize rm and rn to save registers
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rm = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
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rn = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
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C = C + (rm[:, None] * stride_cm + rn[None, :] * stride_cn)
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mask = (rm[:, None] < M) & (rn[None, :] < N)
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tl.store(C, acc, mask=mask)
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# %%
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# We can also create a convenience wrapper function that only takes two input tensors
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# and (1) checks any shape constraint; (2) allocates the output; (3) launches the kernel
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def matmul(a, b, activation=None):
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# checks constraints
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assert a.shape[1] == b.shape[0], "incompatible dimensions"
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assert a.is_contiguous(), "matrix A must be contiguous"
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assert b.is_contiguous(), "matrix B must be contiguous"
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M, K = a.shape
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_, N = b.shape
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# allocates output
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c = torch.empty((M, N), device=a.device, dtype=a.dtype)
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# launch kernel
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grid = lambda META: (triton.cdiv(M, META['BLOCK_M']) * triton.cdiv(N, META['BLOCK_N']), )
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pgm = _matmul[grid](
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a, b, c, M, N, K, \
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a.stride(0), a.stride(1), b.stride(0), b.stride(1), c.stride(0), c.stride(1),\
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ACTIVATION = activation
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)
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#print(pgm.asm('ttir'))
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# return output
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return c
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# %%
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# Unit Test
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# -----------
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#
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# We can test our custom matrix multiplication operation against a native torch implementation (i.e., cuBLAS + custom element-wise swish kernel)
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#torch.manual_seed(0)
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# a = torch.randn((512, 512), device='cuda', dtype=torch.float16)
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# b = torch.randn((512, 512), device='cuda', dtype=torch.float16)
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# c_0 = matmul(a, b, activation=None)
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# c_1 = torch.matmul(a, b)
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# print(c_0)
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# print(c_1)
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# print(triton.testing.allclose(c_0, c_1))
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# exit()
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# %%
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# Benchmark
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# --------------
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#
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# Square Matrix Performance
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# ~~~~~~~~~~~~~~~~~~~~~~~~~~
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# We can now compare the performance of our kernel against CUTLASS. Here we focus on square matrices, but feel free to arrange the script as you wish to compare any other matrix shape.#
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@triton.testing.perf_report(
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triton.testing.Benchmark(
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x_names=['M', 'N', 'K'], # argument names to use as an x-axis for the plot
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x_vals=[8192], # different possible values for `x_name`
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line_arg='provider', # argument name whose value corresponds to a different line in the plot
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line_vals=['cublas', 'triton'], # possible values for `line_arg``
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line_names=["cuBLAS", "Triton"], # label name for the lines
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ylabel="TFLOPS", # label name for the y-axis
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plot_name="matmul-performance", # name for the plot. Used also as a file name for saving the plot.
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args={}
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)
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)
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def benchmark(M, N, K, provider):
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silu = torch.nn.SiLU()
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a = torch.randn((M, K), device='cuda', dtype=torch.float16)
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b = torch.randn((K, N), device='cuda', dtype=torch.float16)
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if provider == 'cublas':
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ms, min_ms, max_ms = triton.testing.do_bench(lambda: torch.matmul(a, b))
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if provider == 'triton':
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ms, min_ms, max_ms = triton.testing.do_bench(lambda: matmul(a, b))
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perf = lambda ms: 2 * M * N * K * 1e-12 / (ms * 1e-3)
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return perf(ms), perf(max_ms), perf(min_ms)
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benchmark.run(show_plots=True, print_data=True) |