- A100 support via mma.16816 - Thread swizzling for conflict-free shared memory accesses without padding - Complete overhaul of the LLVM code generation in codegen/selection/generator.cc to remove overengineering - Added debugging capabilities in the Python binding - Compilation error for kernels that spill
174 lines
5.6 KiB
C++
174 lines
5.6 KiB
C++
#include "triton/codegen/target.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/IntrinsicsNVPTX.h"
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#include "llvm/IR/IntrinsicsAMDGPU.h"
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#include "llvm/IR/Value.h"
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#include "llvm/IR/IRBuilder.h"
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#include <iostream>
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using namespace llvm;
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namespace triton{
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namespace codegen{
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// base
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nvidia_cu_target* target::as_nvidia() {
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return dynamic_cast<nvidia_cu_target*>(this);
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}
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bool target::is_gpu() const {
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return is_gpu_;
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}
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// AMD
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void amd_cl_target::set_kernel(IRBuilder<>& builder, LLVMContext &ctx, Module *module, Function* fn) {
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fn->setCallingConv(CallingConv::AMDGPU_KERNEL);
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}
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Instruction* amd_cl_target::add_barrier(Module *module, IRBuilder<>& builder) {
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Function *barrier = Intrinsic::getDeclaration(module, Intrinsic::amdgcn_s_barrier);
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return builder.CreateIntrinsic(Intrinsic::amdgcn_s_barrier, {}, {});
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}
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Value* amd_cl_target::get_global_offset(Module *module, IRBuilder<>& builder, unsigned stride, unsigned ax) {
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Value* group_id = get_block_id(module, builder, ax);
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Value* result = builder.CreateMul(builder.getInt32(stride), group_id);
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return result;
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}
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Instruction* amd_cl_target::add_memfence(Module *module, IRBuilder<>& builder) {
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throw std::runtime_error("not implemented");
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}
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Value* amd_cl_target::get_block_id(Module *module, IRBuilder<>& builder, unsigned ax) {
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static std::array<Intrinsic::ID, 3> ids = {
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Intrinsic::amdgcn_workgroup_id_x,
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Intrinsic::amdgcn_workgroup_id_y,
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Intrinsic::amdgcn_workgroup_id_z
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};
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Value* group_id = builder.CreateIntrinsic(ids[ax], {}, {});
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return group_id;
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}
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Value* amd_cl_target::get_num_blocks(Module *module, IRBuilder<>& builder, unsigned ax) {
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throw std::runtime_error("not implemented on AMD");
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}
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Value* amd_cl_target::get_local_id(Module *module, IRBuilder<>& builder, unsigned ax) {
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static std::array<Intrinsic::ID, 3> ids = {
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Intrinsic::amdgcn_workitem_id_x,
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Intrinsic::amdgcn_workitem_id_y,
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Intrinsic::amdgcn_workitem_id_z
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};
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Function *get_local_id = Intrinsic::getDeclaration(module, ids[ax]);
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return builder.CreateCall(get_local_id, {});
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}
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// NVIDIA
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void nvidia_cu_target::set_kernel(IRBuilder<>& builder, LLVMContext &ctx, Module *module, Function* fn){
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// set metadata
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Metadata *md_args[] = {
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ValueAsMetadata::get(fn),
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MDString::get(ctx, "kernel"),
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ValueAsMetadata::get(builder.getInt32(1))
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};
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module->getOrInsertNamedMetadata("nvvm.annotations")->addOperand(MDNode::get(ctx, md_args));
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}
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Instruction* nvidia_cu_target::add_barrier(Module *module, IRBuilder<>& builder) {
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Function *barrier = Intrinsic::getDeclaration(module, Intrinsic::nvvm_barrier0);
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return builder.CreateCall(barrier, {});
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}
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Instruction* nvidia_cu_target::add_memfence(Module *module, IRBuilder<>& builder) {
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Function *barrier = Intrinsic::getDeclaration(module, Intrinsic::nvvm_membar_gl);
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return builder.CreateCall(barrier, {});
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}
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Value* nvidia_cu_target::get_global_offset(Module *module, IRBuilder<>& builder, unsigned stride, unsigned ax) {
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Value* group_id = get_block_id(module, builder, ax);
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Value* result = builder.CreateMul(builder.getInt32(stride), group_id);
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return result;
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}
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Value* nvidia_cu_target::get_block_id(Module *module, IRBuilder<>& builder, unsigned ax) {
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static std::array<Intrinsic::ID, 3> cta_ids = {
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Intrinsic::nvvm_read_ptx_sreg_ctaid_x,
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Intrinsic::nvvm_read_ptx_sreg_ctaid_y,
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Intrinsic::nvvm_read_ptx_sreg_ctaid_z
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};
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Value* cta_id = builder.CreateIntrinsic(cta_ids[ax], {}, {});
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return cta_id;
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}
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Value* nvidia_cu_target::get_local_id(Module *module, IRBuilder<>& builder, unsigned ax) {
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static std::array<Intrinsic::ID, 3> ids = {
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Intrinsic::nvvm_read_ptx_sreg_tid_x,
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Intrinsic::nvvm_read_ptx_sreg_tid_y,
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Intrinsic::nvvm_read_ptx_sreg_tid_z
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};
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Function *get_local_id = Intrinsic::getDeclaration(module, ids[ax]);
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return builder.CreateCall(get_local_id, {});
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}
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Value* nvidia_cu_target::get_num_blocks(Module *module, IRBuilder<>& builder, unsigned ax) {
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static std::array<Intrinsic::ID, 3> ids = {
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Intrinsic::nvvm_read_ptx_sreg_nctaid_x,
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Intrinsic::nvvm_read_ptx_sreg_nctaid_y,
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Intrinsic::nvvm_read_ptx_sreg_nctaid_z
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};
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return builder.CreateIntrinsic(ids[ax], {}, {});
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}
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// CPU
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void cpu_target::set_kernel(IRBuilder<>& builder, LLVMContext &ctx, Module *module, Function* fn) {
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// normal cpu functions can be kernels
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}
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Instruction* cpu_target::add_barrier(Module *module, IRBuilder<>& builder) {
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// no barrier on CPU
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return (Instruction*)builder.CreateAdd(builder.getInt32(0), builder.getInt32(0));
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}
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Instruction* cpu_target::add_memfence(Module *module, IRBuilder<>& builder) {
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// no barrier on CPU
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return (Instruction*)builder.CreateAdd(builder.getInt32(0), builder.getInt32(0));
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}
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Value* cpu_target::get_block_id(Module *module, llvm::IRBuilder<> &builder, unsigned ax) {
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const Function *fn = builder.GetInsertBlock()->getParent();
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size_t num_params = fn->getFunctionType()->getNumParams();
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static std::array<const Argument*, 3> ids = {
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fn->arg_begin() + num_params - 3,
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fn->arg_begin() + num_params - 2,
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fn->arg_begin() + num_params - 1
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};
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return (Argument*)ids[ax];
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}
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Value* cpu_target::get_num_blocks(Module *module, IRBuilder<>& builder, unsigned ax) {
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throw std::runtime_error("not implemented");
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}
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Value* cpu_target::get_global_offset(Module *module, IRBuilder<>& builder, unsigned stride, unsigned ax) {
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Value* result = builder.CreateMul(builder.getInt32(stride), get_block_id(module, builder, ax));
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return result;
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}
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Value* cpu_target::get_local_id(Module *module, IRBuilder<>& builder, unsigned ax) {
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return builder.getInt32(0);
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}
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}
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}
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