083bbd1e8d
- A100 support via mma.16816 - Thread swizzling for conflict-free shared memory accesses without padding - Complete overhaul of the LLVM code generation in codegen/selection/generator.cc to remove overengineering - Added debugging capabilities in the Python binding - Compilation error for kernels that spill
252 lines
12 KiB
C++
Executable File
252 lines
12 KiB
C++
Executable File
/* Copyright 2015-2017 Philippe Tillet
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "triton/driver/dispatch.h"
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#include "triton/driver/context.h"
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#include "triton/tools/sys/getenv.hpp"
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namespace triton
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{
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namespace driver
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{
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//Helpers for function definition
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#define DEFINE0(init, hlib, ret, fname) ret dispatch::fname()\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname); }
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#define DEFINE1(init, hlib, ret, fname, t1) ret dispatch::fname(t1 a)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a); }
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#define DEFINE2(init, hlib, ret, fname, t1, t2) ret dispatch::fname(t1 a, t2 b)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b); }
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#define DEFINE3(init, hlib, ret, fname, t1, t2, t3) ret dispatch::fname(t1 a, t2 b, t3 c)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c); }
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#define DEFINE4(init, hlib, ret, fname, t1, t2, t3, t4) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d); }
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#define DEFINE5(init, hlib, ret, fname, t1, t2, t3, t4, t5) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e); }
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#define DEFINE6(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f); }
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#define DEFINE7(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g); }
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#define DEFINE8(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g, t8 h)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g, h); }
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#define DEFINE9(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g, t8 h, t9 i)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g, h, i); }
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#define DEFINE10(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g, t8 h, t9 i, t10 j)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g, h, i, j); }
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#define DEFINE11(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g, t8 h, t9 i, t10 j, t11 k)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g, h, i, j, k); }
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#define DEFINE13(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g, t8 h, t9 i, t10 j, t11 k, t12 l, t13 m)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g, h, i, j, k, l, m); }
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#define DEFINE19(init, hlib, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13, t14, t15, t16, t17, t18, t19) ret dispatch::fname(t1 a, t2 b, t3 c, t4 d, t5 e, t6 f, t7 g, t8 h, t9 i, t10 j, t11 k, t12 l, t13 m, t14 n, t15 o, t16 p, t17 q, t18 r, t19 s)\
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{return f_impl<dispatch::init>(hlib, fname, fname ## _, #fname, a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q, r, s); }
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//Specialized helpers for CUDA
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#define CUDA_DEFINE1(ret, fname, t1) DEFINE1(cuinit, cuda_, ret, fname, t1)
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#define CUDA_DEFINE2(ret, fname, t1, t2) DEFINE2(cuinit, cuda_, ret, fname, t1, t2)
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#define CUDA_DEFINE3(ret, fname, t1, t2, t3) DEFINE3(cuinit, cuda_, ret, fname, t1, t2, t3)
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#define CUDA_DEFINE4(ret, fname, t1, t2, t3, t4) DEFINE4(cuinit, cuda_, ret, fname, t1, t2, t3, t4)
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#define CUDA_DEFINE5(ret, fname, t1, t2, t3, t4, t5) DEFINE5(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5)
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#define CUDA_DEFINE6(ret, fname, t1, t2, t3, t4, t5, t6) DEFINE6(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5, t6)
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#define CUDA_DEFINE7(ret, fname, t1, t2, t3, t4, t5, t6, t7) DEFINE7(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5, t6, t7)
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#define CUDA_DEFINE8(ret, fname, t1, t2, t3, t4, t5, t6, t7, t8) DEFINE8(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8)
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#define CUDA_DEFINE9(ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9) DEFINE9(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9)
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#define CUDA_DEFINE10(ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10) DEFINE10(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10)
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#define CUDA_DEFINE11(ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11) DEFINE11(cuinit, cuda_, ret, fname, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11)
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#define NVML_DEFINE0(ret, fname) DEFINE0(nvmlinit, nvml_, ret, fname)
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#define NVML_DEFINE1(ret, fname, t1) DEFINE1(nvmlinit, nvml_, ret, fname, t1)
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#define NVML_DEFINE2(ret, fname, t1, t2) DEFINE2(nvmlinit, nvml_, ret, fname, t1, t2)
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#define NVML_DEFINE3(ret, fname, t1, t2, t3) DEFINE3(nvmlinit, nvml_, ret, fname, t1, t2, t3)
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bool dispatch::cuinit(){
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if(cuda_==nullptr){
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putenv((char*)"CUDA_CACHE_DISABLE=1");
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std::string libcuda = tools::getenv("TRITON_LIBCUDA");
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if(libcuda.empty())
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cuda_ = dlopen("libcuda.so", RTLD_LAZY);
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else
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cuda_ = dlopen(libcuda.c_str(), RTLD_LAZY);
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}
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if(cuda_ == nullptr)
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return false;
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CUresult (*fptr)(unsigned int);
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cuInit_ = dlsym(cuda_, "cuInit");
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*reinterpret_cast<void **>(&fptr) = cuInit_;
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CUresult res = (*fptr)(0);
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check(res);
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return true;
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}
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bool dispatch::nvmlinit(){
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if(nvml_==nullptr)
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nvml_ = dlopen("libnvidia-ml.so", RTLD_LAZY);
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nvmlReturn_t (*fptr)();
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nvmlInit_v2_ = dlsym(nvml_, "nvmlInit_v2");
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*reinterpret_cast<void **>(&fptr) = nvmlInit_v2_;
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nvmlReturn_t res = (*fptr)();
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check(res);
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return res;
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}
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bool dispatch::spvllvminit(){
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if(spvllvm_==nullptr)
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spvllvm_ = dlopen("libLLVMSPIRVLib.so", RTLD_LAZY);
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return spvllvm_ != nullptr;
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}
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//CUDA
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CUDA_DEFINE1(CUresult, cuCtxDestroy_v2, CUcontext)
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CUDA_DEFINE2(CUresult, cuEventCreate, CUevent *, unsigned int)
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CUDA_DEFINE2(CUresult, cuDeviceGet, CUdevice *, int)
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CUDA_DEFINE3(CUresult, cuMemcpyDtoH_v2, void *, CUdeviceptr, size_t)
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CUDA_DEFINE2(CUresult, cuStreamCreate, CUstream *, unsigned int)
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CUDA_DEFINE3(CUresult, cuEventElapsedTime, float *, CUevent, CUevent)
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CUDA_DEFINE1(CUresult, cuMemFree_v2, CUdeviceptr)
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CUDA_DEFINE4(CUresult, cuMemcpyDtoHAsync_v2, void *, CUdeviceptr, size_t, CUstream)
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CUDA_DEFINE1(CUresult, cuDriverGetVersion, int *)
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CUDA_DEFINE3(CUresult, cuDeviceGetName, char *, int, CUdevice)
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CUDA_DEFINE3(CUresult, cuDeviceGetPCIBusId, char *, int, CUdevice)
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CUDA_DEFINE4(CUresult, cuModuleGetGlobal_v2, CUdeviceptr*, size_t*, CUmodule, const char*)
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CUDA_DEFINE4(CUresult, cuMemcpyHtoDAsync_v2, CUdeviceptr, const void *, size_t, CUstream)
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CUDA_DEFINE2(CUresult, cuModuleLoad, CUmodule *, const char *)
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CUDA_DEFINE11(CUresult, cuLaunchKernel, CUfunction, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, CUstream, void **, void **)
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CUDA_DEFINE1(CUresult, cuModuleUnload, CUmodule)
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CUDA_DEFINE5(CUresult, cuModuleLoadDataEx, CUmodule *, const void *, unsigned int, CUjit_option *, void **)
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CUDA_DEFINE3(CUresult, cuDeviceGetAttribute, int *, CUdevice_attribute, CUdevice)
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CUDA_DEFINE1(CUresult, cuDeviceGetCount, int *)
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CUDA_DEFINE3(CUresult, cuMemcpyHtoD_v2, CUdeviceptr, const void *, size_t )
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CUDA_DEFINE1(CUresult, cuInit, unsigned int)
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CUDA_DEFINE2(CUresult, cuEventRecord, CUevent, CUstream)
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CUDA_DEFINE3(CUresult, cuCtxCreate_v2, CUcontext *, unsigned int, CUdevice)
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CUDA_DEFINE3(CUresult, cuModuleGetFunction, CUfunction *, CUmodule, const char *)
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CUDA_DEFINE1(CUresult, cuStreamSynchronize, CUstream)
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CUDA_DEFINE1(CUresult, cuStreamDestroy_v2, CUstream)
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CUDA_DEFINE2(CUresult, cuStreamGetCtx, CUstream, CUcontext*)
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CUDA_DEFINE1(CUresult, cuEventDestroy_v2, CUevent)
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CUDA_DEFINE2(CUresult, cuMemAlloc_v2, CUdeviceptr*, size_t)
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CUDA_DEFINE3(CUresult, cuPointerGetAttribute, void*, CUpointer_attribute, CUdeviceptr)
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CUDA_DEFINE1(CUresult, cuCtxGetDevice, CUdevice*)
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CUDA_DEFINE1(CUresult, cuCtxGetCurrent, CUcontext*)
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CUDA_DEFINE1(CUresult, cuCtxSetCurrent, CUcontext)
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CUDA_DEFINE4(CUresult, cuMemsetD8Async, CUdeviceptr, unsigned char, size_t, CUstream)
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CUDA_DEFINE1(CUresult, cuCtxPushCurrent_v2, CUcontext)
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CUDA_DEFINE1(CUresult, cuCtxPopCurrent_v2, CUcontext*)
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CUDA_DEFINE3(CUresult, cuFuncGetAttribute, int*, CUfunction_attribute, CUfunction)
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CUDA_DEFINE3(CUresult, cuFuncSetAttribute, CUfunction, CUfunction_attribute, int)
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CUDA_DEFINE2(CUresult, cuFuncSetCacheConfig, CUfunction, CUfunc_cache)
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NVML_DEFINE2(nvmlReturn_t, nvmlDeviceGetHandleByPciBusId_v2, const char *, nvmlDevice_t*)
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NVML_DEFINE3(nvmlReturn_t, nvmlDeviceGetClockInfo, nvmlDevice_t, nvmlClockType_t, unsigned int*)
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NVML_DEFINE3(nvmlReturn_t, nvmlDeviceGetMaxClockInfo, nvmlDevice_t, nvmlClockType_t, unsigned int*)
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NVML_DEFINE3(nvmlReturn_t, nvmlDeviceSetApplicationsClocks, nvmlDevice_t, unsigned int, unsigned int)
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// LLVM to SPIR-V
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int dispatch::initializeLLVMToSPIRVPass(llvm::PassRegistry ®istry){
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return f_impl<dispatch::spvllvminit>(spvllvm_, initializeLLVMToSPIRVPass, initializeLLVMToSPIRVPass_, "initializeLLVMToSPIRVPass", std::ref(registry));
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}
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bool dispatch::writeSpirv(llvm::Module *M, std::ostream &OS, std::string &ErrMsg){
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return f_impl<dispatch::spvllvminit>(spvllvm_, writeSpirv, writeSpirv_, "writeSpirv", M, std::ref(OS), std::ref(ErrMsg));
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}
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// Release
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void dispatch::release(){
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if(cuda_){
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dlclose(cuda_);
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cuda_ = nullptr;
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}
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}
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void* dispatch::cuda_;
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void* dispatch::nvml_;
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void* dispatch::spvllvm_;
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//CUDA
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void* dispatch::cuCtxGetCurrent_;
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void* dispatch::cuCtxSetCurrent_;
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void* dispatch::cuCtxDestroy_v2_;
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void* dispatch::cuEventCreate_;
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void* dispatch::cuDeviceGet_;
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void* dispatch::cuMemcpyDtoH_v2_;
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void* dispatch::cuStreamCreate_;
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void* dispatch::cuEventElapsedTime_;
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void* dispatch::cuMemFree_v2_;
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void* dispatch::cuMemcpyDtoHAsync_v2_;
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void* dispatch::cuDriverGetVersion_;
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void* dispatch::cuDeviceGetName_;
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void* dispatch::cuDeviceGetPCIBusId_;
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void* dispatch::cuModuleGetGlobal_v2_;
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void* dispatch::cuMemcpyHtoDAsync_v2_;
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void* dispatch::cuModuleLoad_;
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void* dispatch::cuLaunchKernel_;
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void* dispatch::cuModuleUnload_;
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void* dispatch::cuModuleLoadDataEx_;
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void* dispatch::cuDeviceGetAttribute_;
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void* dispatch::cuDeviceGetCount_;
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void* dispatch::cuMemcpyHtoD_v2_;
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void* dispatch::cuInit_;
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void* dispatch::cuEventRecord_;
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void* dispatch::cuCtxCreate_v2_;
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void* dispatch::cuModuleGetFunction_;
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void* dispatch::cuStreamSynchronize_;
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void* dispatch::cuStreamDestroy_v2_;
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void* dispatch::cuStreamGetCtx_;
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void* dispatch::cuEventDestroy_v2_;
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void* dispatch::cuMemAlloc_v2_;
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void* dispatch::cuPointerGetAttribute_;
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void* dispatch::cuCtxGetDevice_;
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void* dispatch::cuMemsetD8Async_;
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void* dispatch::cuCtxPushCurrent_v2_;
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void* dispatch::cuCtxPopCurrent_v2_;
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void* dispatch::cuFuncGetAttribute_;
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void* dispatch::cuFuncSetAttribute_;
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void* dispatch::cuFuncSetCacheConfig_;
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void* dispatch::nvmlInit_v2_;
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void* dispatch::nvmlDeviceGetHandleByPciBusId_v2_;
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void* dispatch::nvmlDeviceGetClockInfo_;
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void* dispatch::nvmlDeviceGetMaxClockInfo_;
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void* dispatch::nvmlDeviceSetApplicationsClocks_;
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// SPIR-V
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void* dispatch::initializeLLVMToSPIRVPass_;
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void* dispatch::writeSpirv_;
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}
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}
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