565 lines
19 KiB
ReStructuredText
565 lines
19 KiB
ReStructuredText
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.. DO NOT EDIT.
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.. THIS FILE WAS AUTOMATICALLY GENERATED BY SPHINX-GALLERY.
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.. TO MAKE CHANGES, EDIT THE SOURCE PYTHON FILE:
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.. "getting-started/tutorials/03-matrix-multiplication.py"
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.. LINE NUMBERS ARE GIVEN BELOW.
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.. only:: html
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.. note::
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:class: sphx-glr-download-link-note
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Click :ref:`here <sphx_glr_download_getting-started_tutorials_03-matrix-multiplication.py>`
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to download the full example code
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.. rst-class:: sphx-glr-example-title
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.. _sphx_glr_getting-started_tutorials_03-matrix-multiplication.py:
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Matrix Multiplication
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======================
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In this tutorial, you will write a 25-lines high-performance matrix multiplication kernel that outperforms CUTLASS and falls just short of matching cuBLAS's performance.
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You will specifically learn about:
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- The block-level matrix multiplication operator `@`
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- Multi-dimensional pointer arithmetic
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- Program re-ordering for improved L2 cache hit rate
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- Automatic performance tuning
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.. GENERATED FROM PYTHON SOURCE LINES 14-35
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Motivations
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-------------
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Matrix multiplications are a key building block of most modern high-performance computing systems.
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They are notoriously hard to optimize, hence their implementation is typically done by hardware vendors themselves as part of so-called "kernel libraries" (e.g., cuBLAS).
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Unfortunately, these libraries are often proprietary and cannot be customized to accomodate the needs of modern deep learning workloads (e.g., mixture of experts, fused activation functions, etc.).
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For this reason, this tutorial will show you how to implement efficient matrix multiplications yourself with Triton, in a way that is easy to customize and extend.
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Roughly speaking, the kernel that we will write will implement the following blocked algorithm:
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.. code-block:: python
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# do in parallel
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for m in range(0, M, MB):
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# do in parallel
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for n in range(0, N, NB):
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acc = zeros((MB, NB), dtype=float32)
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for k in range(0, K, KB):
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acc += A[m : m+MB, k : k+KB] @ B[k : k+KB, n : n+NB]
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C[m : m+MB, n : n+NB] = acc;
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where each iteration of the doubly-nested for-loops corresponds to a Triton program instance.
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.. GENERATED FROM PYTHON SOURCE LINES 37-161
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Compute Kernel
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----------------
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The above algorithm is actually fairly straightforward to implement in Triton, as we can simply use the :code:`@` operator for block-level matrix multiplication.
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The main difficulty comes from the 2D pointer arithmetic that must be done to specify the memory locations of the tiles of :code:`A` and :code:`B` that we need to read in the inner loop.
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Pointer Arithmetics
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~~~~~~~~~~~~~~~~~~~~
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For a row-major 2D tensor :code:`X`, the memory location of :code:`X[i, j]` is given by :code:`&X[i, j] = i + X.stride(0) + j`.
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Therefore, blocks of pointers for :code:`A[m : m+MB, k:k+KB]` and :code:`B[k : k+KB, n : n+NB]` can be defined in pseudo-code as:
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.. code-block:: python
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&A[m : m+MB, k:k+KB] = A + (m : m+MB)[:, newaxis]*A.stride(0) + (k : k+KB)[newaxis, :];
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&B[k : k+KB, n:n+NB] = B + (k : k+KB)[:, newaxis]*B.stride(0) + (n : n+NB)[newaxis, :];
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Which means that, at initialization (i.e., :code:`k = 0`), pointers for blocks of A and B can be initialized in Triton as:
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.. code-block:: C
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:force:
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int rm[MB] = program_id_m * MB + 0 ... MB;
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int rn[NB] = program_id_n * NB + 0 ... NB;
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int rk[KB] = 0 ... KB;
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TYPE *pa[MB, KB] = A + (rm[:, newaxis] * stride_a_0 + rk [newaxis, :] * 1);
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TYPE *pb[KB, NB] = B + (rk[:, newaxis] * stride_b_0 + rn [newaxis, :] * 1);
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These pointers can then be updated in the inner loop as:
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.. code-block:: C
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pa += KB * 1;
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pb += KB * ldb;
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L2 Cache Optimizations
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~~~~~~~~~~~~~~~~~~~~~~~~
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As mentioned above, each program instance computes an :code:`[MB, NB]` block of :code:`C`.
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However, the order in which these blocks are computer matters, since it affects the L2 cache hit rate of our program.
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This means that a naive row-major ordering:
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.. code-block:: C
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int program_id = get_program_id(0);
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int grid_m = (M + MB - 1) / MB;
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int grid_n = (N + NB - 1) / NB;
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int program_id_m = program_id / grid_n;
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int program_id_n = program_id % grid_n;
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is unlikely to result in optimal performance.
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One possible solution is to launch blocks in an order that promotes data reuse.
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This can be done by 'super-grouping' blocks in groups of :code:`GROUP_SIZE` before switching to the next column:
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.. code-block:: C
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int program_id = get_program_id(0);
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int width = GROUP_SIZE * grid_n;
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int group_id = pid / width;
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// we need to handle the case where M % (GROUP_SIZE*BM) != 0
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int group_size = min(grid_m - group_id * GROUP_SIZE, GROUP_SIZE);
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int pid_m = group_id * GROUP_SIZE + (pid % group_size);
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int pid_n = (pid % width) / (group_size);
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In practice, this can improve the performance of our matrix multiplication kernel by >10\% on some hardware architecture (e.g., 220 to 245 TFLOPS on A100).
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Final Result
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~~~~~~~~~~~~~~
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We are now ready to put all these pieces together and write our Triton kernel for matrix multiplication.
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Note that we rematerialize :code:`rm` and :code:`rn:` after the inner loop to decrease register pressure.
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This is an optimization that provides an additional 5% performance improvement and cannot be currently done by the Triton compiler.
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.. code-block:: C
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:force:
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#define MAX_GROUP_SIZE 8
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__global__ void dot(TYPE* A, TYPE* B, TYPE* C,
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int M, int N, int K,
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int stride_a_0, int stride_b_0, int stride_c_0) {
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// prologue
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int pid = get_program_id(0);
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int grid_m = (M + MB - 1) / MB;
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int grid_n = (N + NB - 1) / NB;
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// re-order program ID for better L2 performance
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int width = MAX_GROUP_SIZE * grid_n;
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int group_id = pid / width;
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int group_size = min(grid_m - group_id * MAX_GROUP_SIZE, MAX_GROUP_SIZE);
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int pid_m = group_id * MAX_GROUP_SIZE + (pid % group_size);
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int pid_n = (pid % width) / (group_size);
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// pointers to operands
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// note the parentheses here; they force the offset
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// computation to happen in typeof(stride_a_0) = int32 rather than
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// typeof(A) = int64
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int rm[MB] = pid_m * MB + 0 ... MB;
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int rn[NB] = pid_n * NB + 0 ... NB;
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int rk[KB] = 0 ... KB;
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TYPE *pa[MB, KB] = A + (rk [newaxis, :] * 1 + rm[:, newaxis] * stride_a_0);
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TYPE *pb[KB, NB] = B + (rk[:, newaxis] * stride_b_0 + rn [newaxis, :] * 1);
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// reduction loop
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float acc[MB, NB] = 0;
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for (int k = K; k > 0; k -= KB) {
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acc += (*pa) @ (*pb);
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pa += KB * 1;
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pb += KB * stride_b_0;
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}
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// pointers to output
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// here we rematerialize `rm` and `rn` so that they are not live through
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// the above reduction loop. In the future, the compiler should be able to
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// do this automatically.
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rm = pid_m * MB + 0 ... MB;
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rn = pid_n * NB + 0 ... NB;
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TYPE *pc[MB, NB] = C + (rm[:, newaxis] * stride_c_0 + rn[newaxis, :]);
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// we write back using *?() operator. `acc` gets casted to `float32` implicitly.
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*? (rm[:, newaxis] < M && rn [newaxis, :] < N) pc = acc;
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}
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Where :code:`TYPE` is the data-type of the input matrices and :code:`MB`, :code:`NB`, :code:`KB` are the block sizes defined in the above pseudo-code.
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Good values for these block sizes are hard to find, hence we will introduce the auto-tuner in the next section of this tutorial.
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If :code:`TYPE` is :code:`half`, then tensor cores will be used automatically provided that :code:`MB`, :code:`NB` and :code:`KB` are multiples of 16.
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.. GENERATED FROM PYTHON SOURCE LINES 163-170
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Torch Bindings
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----------------
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Auto-Tuning
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~~~~~~~~~~~~~~
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In order to use Triton's built-in auto-tuner in the above kernel, we need to define a list of :code:`triton.config` objects. that can be constructed as follows:
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.. GENERATED FROM PYTHON SOURCE LINES 170-185
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.. code-block:: default
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import torch
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import triton
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autotune_configs = [
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triton.config(defines={"MB": "128", "NB": "128", "KB": "32"}, num_warps=4),
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triton.config(defines={'MB': '64', 'NB': '128', 'KB': '32'}, num_warps=4),
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triton.config(defines={'MB': '128', 'NB': '64', 'KB': '32'}, num_warps=4),
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triton.config(defines={'MB': '64', 'NB': '64', 'KB': '64'}, num_warps=4),
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triton.config(defines={'MB': '32', 'NB': '128', 'KB': '64'}, num_warps=4),
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triton.config(defines={'MB': '128', 'NB': '32', 'KB': '64'}, num_warps=4),
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triton.config(defines={'MB': '64', 'NB': '32', 'KB': '64'}, num_warps=2),
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triton.config(defines={'MB': '32', 'NB': '64', 'KB': '64'}, num_warps=2)
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]
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.. GENERATED FROM PYTHON SOURCE LINES 186-188
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we also need to define a list of :code:`string` (i.e., "autotuning key") that specifies the set of argument names whose change in value will trigger the auto-tuner to kick in.
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Here, we want to re-tune our kernel only when the shape of input matrices changes.
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.. GENERATED FROM PYTHON SOURCE LINES 188-191
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.. code-block:: default
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autotune_key = ["M", "N", "K"]
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.. GENERATED FROM PYTHON SOURCE LINES 192-193
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We can now create an auto-tuned kernel by passing the `autotune_configs` and `autotune_key` lists to the constructor of the :code:`triton.kernel` class.
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.. GENERATED FROM PYTHON SOURCE LINES 193-244
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.. code-block:: default
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src = """
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#define MAX_GROUP_SIZE 8
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__global__ void dot(TYPE* A, TYPE* B, TYPE* C,
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int M, int N, int K,
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int lda, int ldb, int ldc) {
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int pid = get_program_id(0);
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int grid_m = (M + MB - 1) / MB;
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int grid_n = (N + NB - 1) / NB;
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int width = MAX_GROUP_SIZE * grid_n;
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int group_id = pid / width;
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int group_size = min(grid_m - group_id * MAX_GROUP_SIZE, MAX_GROUP_SIZE);
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int pid_m = group_id * MAX_GROUP_SIZE + (pid % group_size);
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int pid_n = (pid % width) / (group_size);
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int rm[MB] = pid_m * MB + 0 ... MB;
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int rn[NB] = pid_n * NB + 0 ... NB;
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int rk[KB] = 0 ... KB;
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TYPE *pa[MB, KB] = A + (rk [newaxis, :] * 1 + rm[:, newaxis] * lda);
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TYPE *pb[KB, NB] = B + (rk[:, newaxis] * ldb + rn [newaxis, :] * 1);
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float acc[MB, NB] = 0;
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for (int k = K; k > 0; k -= KB) {
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acc += (*pa) @ (*pb);
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pa += KB * 1;
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pb += KB * ldb;
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}
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rm = pid_m * MB + 0 ... MB;
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rn = pid_n * NB + 0 ... NB;
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TYPE *pc[MB, NB] = C + (rm[:, newaxis] * ldc + rn[newaxis, :]);
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*? (rm[:, newaxis] < M && rn [newaxis, :] < N) pc = acc;
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}
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"""
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def make_kernel(device, dtype):
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key = (device, dtype)
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cache = make_kernel.cache
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if key not in cache:
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defines = {'TYPE': dtype}
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cache[key] = triton.kernel(
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src,
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device=device,
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defines=defines,
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autotune_configs=autotune_configs,
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autotune_key=autotune_key,
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)
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return cache[key]
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make_kernel.cache = dict()
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.. GENERATED FROM PYTHON SOURCE LINES 245-250
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Autograd Function
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~~~~~~~~~~~~~~~~~~
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Now we are ready to expose our auto-tuned kernel as a `torch.autograd.Function`.
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To do so, we just need to define a `forward` function that takes a two tensors as input and returns a tensor as output.
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.. GENERATED FROM PYTHON SOURCE LINES 250-271
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.. code-block:: default
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class _dot(torch.autograd.Function):
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@staticmethod
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def forward(ctx, a, b):
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M, Ka = a.shape
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Kb, N = b.shape
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assert Ka == Kb, "incompatible dimensions"
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assert a.is_contiguous() and b.is_contiguous(), "inputs must be contiguous"
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c = torch.empty((M, N), device=a.device, dtype=a.dtype)
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kernel = make_kernel(a.device, a.dtype)
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grid = lambda opt: (triton.cdiv(M, opt.MB) * triton.cdiv(N, opt.NB), )
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kernel(a.data_ptr(), b.data_ptr(), c.data_ptr(), \
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M, N, Ka, \
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a.stride(0), b.stride(0), c.stride(0), \
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grid=grid)
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return c
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dot = _dot.apply
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.. GENERATED FROM PYTHON SOURCE LINES 272-277
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Unit Test
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-----------
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We can test our custom matrix multiplication operation against cuBLAS (i.e., :code:`torch.matmul`).
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Note that we need to modify the :code`atol` and :code:`rtol` parameters of `torch.allclose` to account for the fact that we are comparing FP16 tensors.
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.. GENERATED FROM PYTHON SOURCE LINES 277-286
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.. code-block:: default
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a = torch.rand((512, 768), device='cuda', dtype=torch.float16)
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b = torch.rand((768, 896), device='cuda', dtype=torch.float16)
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c_0 = dot(a, b)
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c_1 = torch.matmul(a, b)
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print(c_0)
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print(c_1)
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print(torch.allclose(c_0, c_1, rtol=1e-3, atol=1e-3))
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.. rst-class:: sphx-glr-script-out
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Out:
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.. code-block:: none
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tensor([[199.6250, 198.0000, 195.0000, ..., 186.0000, 193.6250, 202.1250],
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[192.6250, 193.6250, 190.7500, ..., 184.2500, 191.2500, 192.1250],
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[192.3750, 196.6250, 188.8750, ..., 185.5000, 188.7500, 191.8750],
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...,
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[196.6250, 199.8750, 196.1250, ..., 182.6250, 194.5000, 200.8750],
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[199.2500, 200.3750, 191.7500, ..., 186.8750, 192.8750, 193.5000],
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[193.5000, 195.2500, 194.1250, ..., 188.3750, 192.6250, 198.3750]],
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device='cuda:0', dtype=torch.float16)
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tensor([[199.6250, 198.0000, 195.0000, ..., 186.0000, 193.6250, 202.1250],
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[192.6250, 193.6250, 190.7500, ..., 184.2500, 191.2500, 192.1250],
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[192.3750, 196.6250, 188.8750, ..., 185.5000, 188.7500, 191.8750],
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...,
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[196.6250, 199.8750, 196.1250, ..., 182.6250, 194.5000, 200.8750],
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[199.2500, 200.3750, 191.7500, ..., 186.8750, 192.8750, 193.5000],
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[193.5000, 195.2500, 194.1250, ..., 188.3750, 192.6250, 198.3750]],
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device='cuda:0', dtype=torch.float16)
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True
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.. GENERATED FROM PYTHON SOURCE LINES 287-333
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Benchmark
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--------------
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Installing The CUTLASS Bindings
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The cuBLAS library (used by :code:`torch.matmul`) uses handwritten assembly-level optimizations that cannot be replicated using publicly available tools.
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For this reason, we will instead compare the performance of our kernel against `CUTLASS <https://github.com/NVIDIA/cutlass/>`_ , a highly optimized CUDA library for matrix multiplication written by NVIDIA themselves._
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To install CUTLASS, you need a recent version of cmake:
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.. code-block:: bash
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cd /path/to/cutlass/
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git clone https://github.com/NVIDIA/cutlass.git
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cd cutlass
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mkdir build
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cd build
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wget https://github.com/Kitware/CMake/releases/download/v3.19.4/cmake-3.19.4-Linux-x86_64.tar.gz
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tar xzvf *.tar.gz
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You can then install CUTLASS as follows for V100
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.. code-block:: bash
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./cmake-3.19.4-Linux-x86_64/bin/cmake ../ -DCUTLASS_NVCC_ARCHS_ENABLED=70 -DCUTLASS_LIBRARY_KERNELS=cutlass_tensorop_f16_s884gemm_f16_*_align8
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make -j8 install
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Or as follows for A100:
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.. code-block:: bash
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./cmake-3.19.4-Linux-x86_64/bin/cmake ../ -DCUTLASS_NVCC_ARCHS_ENABLED=80 -DCUTLASS_LIBRARY_KERNELS=cutlass_tensorop_f16_s16816gemm_*align8
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make -j8 install
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Where you can change CUTLASS_LIBRARY_KERNELS as you desire. Here, we are only interested in FP16 tensor core performance.
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Triton comes with some basic Python bindings for benchmarking CUTLASS. These will be compiled when the environment variables :code:`CUTLASS_INCLUDE_DIR` and :code:`CUTLASS_LIBRARY_DIR` are set during the installation process.
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To re-install Triton with the updated CUTLASS bindings, run the following command:
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.. code-block:: bash
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export CUTLASS_INCLUDE_DIR=/tmp/cutlass/build/install/include/
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export CUTLASS_LIBRARY_DIR=/tmp/cutlass/build/install/lib/
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pip uninstall -y triton
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pip install -e "git+https://github.com/ptillet/triton.git#egg=triton&subdirectory=python"
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Which we can test as follows:
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.. GENERATED FROM PYTHON SOURCE LINES 333-339
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.. code-block:: default
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import triton
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c_2 = triton.testing.cutlass_matmul(a, b)
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print(c_2)
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print(torch.allclose(c_0, c_2, rtol=1e-3, atol=1e-3))
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.. rst-class:: sphx-glr-script-out
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Out:
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.. code-block:: none
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tensor([[199.6250, 198.0000, 195.0000, ..., 186.0000, 193.6250, 202.1250],
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[192.6250, 193.6250, 190.7500, ..., 184.2500, 191.2500, 192.1250],
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[192.3750, 196.6250, 188.8750, ..., 185.5000, 188.7500, 191.8750],
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...,
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[196.6250, 199.8750, 196.1250, ..., 182.6250, 194.5000, 200.8750],
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[199.2500, 200.3750, 191.7500, ..., 186.8750, 192.8750, 193.5000],
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[193.5000, 195.2500, 194.1250, ..., 188.3750, 192.6250, 198.3750]],
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device='cuda:0', dtype=torch.float16)
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True
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.. GENERATED FROM PYTHON SOURCE LINES 340-345
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Note that this wrapper for CUTLASS was written for benchmarking purposes and is probably not production-ready.
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Square Matrix Performance
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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We can now compare the performance of our kernel against CUTLASS. Here we focus on square matrices, but feel free to arrange the script as you wish to compare any other matrix shape.#
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.. GENERATED FROM PYTHON SOURCE LINES 345-374
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.. code-block:: default
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@triton.testing.perf_report(
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triton.testing.Benchmark(
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x_names=['M', 'N', 'K'], # argument names to use as an x-axis for the plot
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x_vals=[256 * i for i in range(2, 33)], # different possible values for `x_name`
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y_name='provider', # argument name whose value corresponds to a different line in the plot
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y_vals=['cublas', 'triton', 'cutlass'], # possible keys for `y_name`
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y_lines=["cuBLAS", "Triton", 'CUTLASS'], # label name for the lines
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ylabel="TFLOPS", # label name for the y-axis
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plot_name="matmul-performance", # name for the plot. Used also as a file name for saving the plot.
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args={}
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)
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)
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def benchmark(M, N, K, provider):
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a = torch.randn((M, K), device='cuda', dtype=torch.float16)
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b = torch.randn((K, N), device='cuda', dtype=torch.float16)
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if provider == 'cublas':
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ms, min_ms, max_ms = triton.testing.do_bench(lambda: torch.matmul(a, b))
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if provider == 'triton':
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ms, min_ms, max_ms = triton.testing.do_bench(lambda: dot(a, b))
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if provider == 'cutlass':
|
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ms, min_ms, max_ms = triton.testing.do_bench(lambda: triton.testing.cutlass_matmul(a, b))
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perf = lambda ms: 2 * M * N * K * 1e-12 / (ms * 1e-3)
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return perf(ms), perf(max_ms), perf(min_ms)
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benchmark.run(show_plots=True)
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.. image:: /getting-started/tutorials/images/sphx_glr_03-matrix-multiplication_001.png
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:alt: 03 matrix multiplication
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:class: sphx-glr-single-img
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.. GENERATED FROM PYTHON SOURCE LINES 375-375
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As we can see, the performance of our kernel is pretty good. It is in fact faster than CUTLASS, and therefore probably comparable to the absolute best CUDA code an expert could write.
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.. rst-class:: sphx-glr-timing
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**Total running time of the script:** ( 1 minutes 5.861 seconds)
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.. _sphx_glr_download_getting-started_tutorials_03-matrix-multiplication.py:
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.. only :: html
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.. container:: sphx-glr-footer
|
|
:class: sphx-glr-footer-example
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.. container:: sphx-glr-download sphx-glr-download-python
|
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:download:`Download Python source code: 03-matrix-multiplication.py <03-matrix-multiplication.py>`
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.. container:: sphx-glr-download sphx-glr-download-jupyter
|
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:download:`Download Jupyter notebook: 03-matrix-multiplication.ipynb <03-matrix-multiplication.ipynb>`
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.. only:: html
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.. rst-class:: sphx-glr-signature
|
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`Gallery generated by Sphinx-Gallery <https://sphinx-gallery.github.io>`_
|