f63be0e9b5
1. support atomics-cas 2. add xchg support in atomic_rmw Co-authored-by: dongdongl <dongdongl@nvidia.com>
69 lines
2.0 KiB
TableGen
69 lines
2.0 KiB
TableGen
#ifndef TRITON_ATTR_DEFS
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#define TRITON_ATTR_DEFS
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include "mlir/IR/EnumAttr.td"
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// Attrs for LoadOp
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def TT_CacheModifierAttr : I32EnumAttr<
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"CacheModifier", "",
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[
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I32EnumAttrCase<"NONE", 1, "none">,
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I32EnumAttrCase<"CA", 2, "ca">,
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I32EnumAttrCase<"CG", 3, "cg">,
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]> {
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let cppNamespace = "::mlir::triton";
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}
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def TT_EvictionPolicyAttr : I32EnumAttr<
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"EvictionPolicy", "",
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[
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I32EnumAttrCase<"NORMAL", 1, "evict_normal">,
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I32EnumAttrCase<"EVICT_FIRST", 2, "evict_first">,
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I32EnumAttrCase<"EVICT_LAST", 3, "evict_last">
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]> {
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let cppNamespace = "::mlir::triton";
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}
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// reduction
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def TT_RedOpAttr : I32EnumAttr<
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/*name*/"RedOp", /*summary*/"",
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/*case*/
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[
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I32EnumAttrCase</*sym*/"ADD", 1, /*str*/"add">,
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I32EnumAttrCase<"FADD", 2, "fadd">,
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I32EnumAttrCase<"MIN", 3, "min">,
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I32EnumAttrCase<"MAX", 4, "max">,
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I32EnumAttrCase<"UMIN", 5, "umin">,
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I32EnumAttrCase<"UMAX", 6, "umax">,
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I32EnumAttrCase<"ARGMIN", 7, "argmin">,
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I32EnumAttrCase<"ARGMAX", 8, "argmax">,
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I32EnumAttrCase<"ARGUMIN", 9, "argumin">,
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I32EnumAttrCase<"ARGUMAX", 10, "argumax">,
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I32EnumAttrCase<"FMIN", 11, "fmin">,
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I32EnumAttrCase<"FMAX", 12, "fmax">,
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I32EnumAttrCase<"ARGFMIN", 13, "argfmin">,
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I32EnumAttrCase<"ARGFMAX", 14, "argfmax">,
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I32EnumAttrCase<"XOR", 15, "xor">
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]> {
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let cppNamespace = "::mlir::triton";
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}
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// atomic
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def TT_AtomicRMWAttr : I32EnumAttr<
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"RMWOp", "",
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[
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I32EnumAttrCase<"AND", 1, "and">,
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I32EnumAttrCase<"OR", 2, "or">,
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I32EnumAttrCase<"XOR", 3, "xor">,
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I32EnumAttrCase<"ADD", 4, "add">,
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I32EnumAttrCase<"FADD", 5, "fadd">,
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I32EnumAttrCase<"MAX", 6, "max">,
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I32EnumAttrCase<"MIN", 7, "min">,
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I32EnumAttrCase<"UMAX", 8, "umax">,
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I32EnumAttrCase<"UMIN", 9, "umin">,
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I32EnumAttrCase<"XCHG", 10, "exch">
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]> {
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let cppNamespace = "::mlir::triton";
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}
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#endif
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