Philippe Tillet 8edfe813a5 [FRONTEND][BACKEND] Added trans instruction; made flash attention bwd pass work (#943)

2022-12-03 09:58:24 -08:00

..

Alias.cpp

[FRONTEND][BACKEND] Added trans instruction; made flash attention bwd pass work (#943)

2022-12-03 09:58:24 -08:00

Allocation.cpp

[Triton-MLIR] Two fixes on allocation and backend related with MMA v1 (#930)

2022-11-30 09:27:26 +00:00

AxisInfo.cpp

[Triton-MLIR][BACKEND] Refactor decompose insert_slice_async (#929)

2022-11-30 10:07:34 -08:00

CMakeLists.txt

Analyze shared memory alias (#81)

2022-08-29 10:43:20 -07:00

Membar.cpp

[Triton-MLIR][BACKEND] Fix the membar pass to add missing barriers caused by scf.for (#933)

2022-12-01 11:54:18 -08:00

Utility.cpp

[FRONTEND][BACKEND] Added trans instruction; made flash attention bwd pass work (#943)

2022-12-03 09:58:24 -08:00