mergify[bot] 42c3fbc198 Track discard time of excess packets in sigverify (#22554) (#22569) ...

* discard time histogram

* closer to the if

* update

(cherry picked from commit e616a7ebfc)

# Conflicts:
#	core/src/sigverify_stage.rs

Co-authored-by: anatoly yakovenko <anatoly@solana.com>

2022-01-19 02:42:13 +00:00

..

benches

Revert "Added vote limits to be 75% of total block limit"

2022-01-18 15:10:49 -07:00

src

Track discard time of excess packets in sigverify (#22554) (#22569)

2022-01-19 02:42:13 +00:00

tests

Revert "Revert "Reformat imports to a consistent style for imports""

2021-12-16 19:28:48 -07:00

.gitignore

…

build.rs

Remove frozen ABI modules from solana-sdk

2020-10-20 16:11:30 -07:00

Cargo.toml

Bump version to v1.8.13

2022-01-08 12:27:11 -07:00