[dnn/shift-conv] added and tested NCHW layout
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@@ -78,14 +78,10 @@ class NetReference(nn.Module):
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self.fc2 = nn.Linear(500, 10)
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def forward(self, x):
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#x = x.permute(1, 2, 3, 0).contiguous()
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x = self.conv1(x)
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#x = x.permute(3, 0, 1, 2).contiguous()
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x = self.bn1(x)
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x = F.relu(x)
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#x = x.permute(1, 2, 3, 0).contiguous()
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x = self.conv2(x)
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#x = x.permute(3, 0, 1, 2).contiguous()
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x = self.bn2(x)
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x = F.relu(x)
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x = x.view(-1, 32*7*7)
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@@ -9,12 +9,34 @@
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#define CHECK_CONTIGUOUS(x) AT_CHECK(x.is_contiguous(), #x " must be contiguous")
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#define CHECK_INPUT(x) CHECK_CUDA(x); CHECK_CONTIGUOUS(x)
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void extract_shapes(const torch::Tensor &x,
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int64_t &C, int64_t &H, int64_t &W, int64_t &B,
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triton::dnn::shift::layout_t layout) {
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if(layout == triton::dnn::shift::CHWN){
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C = x.size(0);
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H = x.size(1);
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W = x.size(2);
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B = x.size(3);
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}
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else if(layout == triton::dnn::shift::NCHW){
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B = x.size(0);
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C = x.size(1);
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H = x.size(2);
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W = x.size(3);
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}
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else{
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throw std::runtime_error("unsupported layout");
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}
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}
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static const triton::dnn::shift::layout_t layout = triton::dnn::shift::NCHW;
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torch::Tensor shift_common(
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int32_t B, int32_t C, int32_t D, int32_t H, int32_t W,
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int32_t T, int32_t R, int32_t S, int32_t F,
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int32_t stride_h, int32_t stride_w,
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int32_t* shift_h, int32_t* shift_w,
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triton::dnn::shift::type ty,
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triton::dnn::shift::type ty, triton::dnn::shift::layout_t layout,
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torch::Tensor torcha, torch::Tensor torchb, torch::Tensor torchbias,
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bool autotune = false
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) {
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@@ -28,7 +50,7 @@ torch::Tensor shift_common(
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triton::dnn::shift shift(B, C, D, H, W, T, R, S, F,
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stride_h, stride_w,
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shift_h, shift_w, "fp32", "fp32",
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ty, has_bias);
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ty, has_bias, layout);
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// Bind memory
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triton::driver::cu_buffer a(ctx, (CUdeviceptr)torcha.storage().data(), false);
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triton::driver::cu_buffer b(ctx, (CUdeviceptr)torchb.storage().data(), false);
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@@ -56,10 +78,8 @@ torch::Tensor shift_y(
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CHECK_INPUT(x);
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CHECK_INPUT(w);
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// shapes for a
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int64_t Ca = x.size(0);
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int64_t H = x.size(1);
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int64_t W = x.size(2);
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int64_t B = x.size(3);
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int64_t Ca, H, W, B;
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extract_shapes(x, Ca, H, W, B, layout);
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// shapes for b
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int64_t Cb = w.size(0);
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int64_t F = w.size(1);
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@@ -68,7 +88,7 @@ torch::Tensor shift_y(
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// run
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return shift_common(B, C, 1, H, W, 1, R, S, F, stride_h, stride_w,
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(int32_t*)shift_h.storage().data(), (int32_t*)shift_w.storage().data(),
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triton::dnn::shift::FPROP, x, w, bias);
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triton::dnn::shift::FPROP, layout, x, w, bias);
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}
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torch::Tensor shift_dx(
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@@ -81,10 +101,8 @@ torch::Tensor shift_dx(
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CHECK_INPUT(dy);
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CHECK_INPUT(w);
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// shapes for a
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int64_t Ca = dy.size(0);
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int64_t H = dy.size(1);
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int64_t W = dy.size(2);
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int64_t B = dy.size(3);
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int64_t Ca, H, W, B;
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extract_shapes(dy, Ca, H, W, B, layout);
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H *= stride_h;
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W *= stride_w;
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// shapes for b
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@@ -98,7 +116,7 @@ torch::Tensor shift_dx(
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// run
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return shift_common(B, C, 1, H, W, 1, R, S, F, stride_h, stride_w,
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(int32_t*)shift_h.storage().data(), (int32_t*)shift_w.storage().data(),
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triton::dnn::shift::BPROP, dy, w, bias);
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triton::dnn::shift::BPROP, layout, dy, w, bias);
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}
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torch::Tensor shift_dw(
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@@ -111,15 +129,11 @@ torch::Tensor shift_dw(
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CHECK_INPUT(dy);
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CHECK_INPUT(x);
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// shapes for a
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int64_t F = dy.size(0);
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int64_t Ha = dy.size(1);
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int64_t Wa = dy.size(2);
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int64_t Ba = dy.size(3);
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int64_t F, Ha, Wa, Ba;
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extract_shapes(dy, F, Ha, Wa, Ba, layout);
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// shapes for b
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int64_t C = x.size(0);
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int64_t Hb = x.size(1);
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int64_t Wb = x.size(2);
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int64_t Bb = x.size(3);
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int64_t C, Hb, Wb, Bb;
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extract_shapes(x, C, Hb, Wb, Bb, layout);
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// check
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AT_CHECK(Ha*stride_h == Hb, "operands must have the same image height");
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AT_CHECK(Wa*stride_w == Wb, "operands must have the same image width");
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@@ -130,7 +144,7 @@ torch::Tensor shift_dw(
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// run
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return shift_common(B, C, 1, H, W, 1, R, S, F, stride_h, stride_w,
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(int32_t*)shift_h.storage().data(), (int32_t*)shift_w.storage().data(),
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triton::dnn::shift::WGRAD, dy, x, bias);
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triton::dnn::shift::WGRAD, layout, dy, x, bias);
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}
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static auto registry =
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@@ -62,7 +62,7 @@ def run_shift():
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R, S, F = 3, 3, 32
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stride_h, stride_w = 2, 2
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np.random.seed(2)
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a = tf.placeholder(tf.float32, shape=[C, H, W, B])
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a = tf.placeholder(tf.float32, shape=[B, C, H, W])
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b = tf.placeholder(tf.float32, shape=[C, F])
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hshift_h = np.random.randint(- (R//2), R//2 + 1, size=C, dtype=np.int32)
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hshift_w = np.random.randint(- (S//2), R//2 + 1, size=C, dtype=np.int32)
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@@ -70,13 +70,13 @@ def run_shift():
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#hshift_w = np.zeros(C, dtype=np.int32)
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c = module.shift_conv(a, b, stride_h=stride_h, stride_w=stride_w, shift_h=tf.make_tensor_proto(hshift_h), shift_w=tf.make_tensor_proto(hshift_w))
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# feed values
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ha = np.random.rand(C, H, W, B)
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ha = np.random.rand(B, C, H, W)
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hb = np.random.rand(C, F)
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#ha = np.ones((C, H, W, B), dtype=np.float32)
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#ha = np.ones((B, C, H, W), dtype=np.float32)
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#hb = np.ones((C, F), dtype=np.float32)
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sess = tf.InteractiveSession()
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# test
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grads = tf.test.compute_gradient([a, b], [(C, H, W, B), (C, F)], c, (F, H//stride_h, W//stride_w, B),
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grads = tf.test.compute_gradient([a, b], [(B, C, H, W), (C, F)], c, (B, F, H//stride_h, W//stride_w),
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extra_feed_dict = {a: ha, b: hb})
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dw_t, dw_n = grads[1]
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dx_t, dx_n = grads[0]
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@@ -22,7 +22,7 @@ using GPUDevice = Eigen::GpuDevice;
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template<triton::dnn::shift::type OP>
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class ShiftConvOp : public OpKernel {
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public:
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explicit ShiftConvOp(OpKernelConstruction* context) : OpKernel(context) {
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explicit ShiftConvOp(OpKernelConstruction* context) : OpKernel(context), layout_(triton::dnn::shift::NCHW) {
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context->GetAttr("shift_h", &h_shift_h_);
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context->GetAttr("shift_w", &h_shift_w_);
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context->GetAttr("stride_h", &stride_h_);
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@@ -31,20 +31,32 @@ public:
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S_ = 3;
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}
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void ExtractShapes(const Tensor &x, int64_t &C, int64_t &H, int64_t &W, int64_t &B) {
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if(layout_ == triton::dnn::shift::CHWN){
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C = x.dim_size(0);
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H = x.dim_size(1);
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W = x.dim_size(2);
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B = x.dim_size(3);
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}
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else if(layout_ == triton::dnn::shift::NCHW){
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B = x.dim_size(0);
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C = x.dim_size(1);
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H = x.dim_size(2);
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W = x.dim_size(3);
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}
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else{
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throw std::runtime_error("unsupported layout");
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}
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}
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void FillShapes(OpKernelContext* context,
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int64_t &C, int64_t &H, int64_t &W, int64_t &B, int64_t &F,
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const Tensor& tf_a, const Tensor& tf_b) {
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if(OP == triton::dnn::shift::WGRAD) {
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// shapes for a
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F = tf_a.dim_size(0);
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int64_t Ha = tf_a.dim_size(1);
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int64_t Wa = tf_a.dim_size(2);
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int64_t Ba = tf_a.dim_size(3);
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// shapes for b
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C = tf_b.dim_size(0);
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int64_t Hb = tf_b.dim_size(1);
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int64_t Wb = tf_b.dim_size(2);
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int64_t Bb = tf_b.dim_size(3);
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int64_t Ha, Wa, Ba;
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int64_t Hb, Wb, Bb;
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ExtractShapes(tf_a, F, Ha, Wa, Ba);
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ExtractShapes(tf_b, C, Hb, Wb, Bb);
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OP_REQUIRES(context, Ha*stride_h_ == Hb, tensorflow::errors::InvalidArgument("operands must have the same image height"));
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OP_REQUIRES(context, Wa*stride_w_ == Wb, tensorflow::errors::InvalidArgument("operands must have the same image width"));
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OP_REQUIRES(context, Ba == Bb, tensorflow::errors::InvalidArgument("operands must have the same batch size"));
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@@ -54,10 +66,8 @@ public:
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}
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else {
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// shapes for a
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int64_t Ca = tf_a.dim_size(0);
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H = tf_a.dim_size(1);
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W = tf_a.dim_size(2);
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B = tf_a.dim_size(3);
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int64_t Ca;
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ExtractShapes(tf_a, Ca, H, W, B);
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if(OP == triton::dnn::shift::BPROP){
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H *= stride_h_;
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W *= stride_w_;
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@@ -96,7 +106,7 @@ public:
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triton::dnn::shift shift(B, C, D, H, W, T, R_, S_, F,
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stride_h_, stride_w_,
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shift_h_data, shift_w_data,
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"fp32", "fp32", OP, has_bias);
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"fp32", "fp32", OP, has_bias, layout_);
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// shapes for c
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std::vector<int64> c_shapes;
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@@ -122,6 +132,7 @@ private:
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int stride_w_;
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int R_;
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int S_;
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triton::dnn::shift::layout_t layout_;
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};
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REGISTER_KERNEL_BUILDER(Name("ShiftConv").Device(DEVICE_GPU), ShiftConvOp<triton::dnn::shift::FPROP>);
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@@ -65,7 +65,7 @@ public:
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int stride_h, int stride_w,
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const int32_t* shift_h, const int32_t* shift_w,
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std::string a_ty = "fp32", std::string b_ty = "fp32",
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type ty = FPROP, bool bias = false);
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type ty = FPROP, bool bias = false, layout_t layout = CHWN);
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// look-up table
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void build_delta_a();
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@@ -13,7 +13,8 @@ shift::shift(int B, int C,
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int stride_h, int stride_w,
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const int32_t *shift_h, const int32_t *shift_w,
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std::string a_ty, std::string b_ty,
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type ty, bool bias)
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type ty, bool bias,
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layout_t layout)
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: base("shift"),
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B_(B), C_(C),
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AD_(D), AH_(H), AW_(W),
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@@ -23,7 +24,7 @@ shift::shift(int B, int C,
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shift_h_(shift_h), shift_w_(shift_w),
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a_ty_(a_ty), b_ty_(b_ty),
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ty_(ty), bias_(bias),
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layout_(CHWN){
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layout_(layout){
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// max number of channels
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TK_ = 16;
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MAX_C_ = 8192 + TK_;
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