634 Commits

Author SHA1 Message Date
rsanthanam-amd
46fd581b0a Merge pull request #29 from ROCmSoftwarePlatform/parse_amdgcn_from_rocminfo
Changes to eliminate the need for the MI_GPU_ARCH environment variable.
2022-11-18 12:53:25 -06:00
Rohit Santhanam
8cc448d92e Changes to eliminate the need for the MI_GPU_ARCH environment variable.
The AMDGPU arch is now parsed out of the rocminfo dump.
2022-11-18 18:51:57 +00:00
Michael Melesse
9a9fabbba9 Merge pull request #22 from ROCmSoftwarePlatform/IFU_11_1_2022
IFU 11/1/2022
2022-11-01 14:27:33 -04:00
Michael Melesse
15886b5ffc skip segfault 2022-11-01 17:52:18 +00:00
Michael Melesse
d5830b4b6a Merge branch 'master' into IFU_11_1_2022 2022-11-01 17:29:10 +00:00
Michael Melesse
bba1579485 remove scripts 2022-11-01 17:24:35 +00:00
rsanthanam-amd
cc6b5180c7 Merge pull request #19 from ROCmSoftwarePlatform/unskip_test_reduce
reduce the skips for test_reduce functions
2022-11-01 11:05:18 -05:00
Michael Melesse
dfad6bdf36 reduce the skips for test_reduce functions 2022-11-01 15:00:12 +00:00
rsanthanam-amd
f3bcbcfde6 Merge pull request #18 from ROCmSoftwarePlatform/fix_test_dot
Fix 6/7 test dot
2022-11-01 09:34:37 -05:00
Michael Melesse
7ec29a7453 revert scripts 2022-11-01 14:22:33 +00:00
Michael Melesse
4fb9d4904e fix 6/7 dot tests 2022-11-01 14:18:06 +00:00
Michael Melesse
4f3e2d6ed7 Merge branch 'rocm52_fixes_IFU' into fix_test_dot 2022-10-31 19:24:45 +00:00
rsanthanam-amd
fecc7ce248 Fix for test_bitwise subtests for ROCm. (#16)
The issue was that the kernel names were colliding with each other in
the cache.  Since the kernel names were based on the date and time, the
kernels were getting compiled so fast that a subsequent kernel would end
up with the same name as the previous one and would therefore overwrite
it in the cache.

It seems to run the same test multiple times but the subsequent runs
would end up using the wrong kernel because of the collisions.

It is fixed by appending a randomly generated alphanumeric string to
keep the kernel names unique.
2022-10-31 15:24:08 -04:00
Michael Melesse
277b712284 save changes 2022-10-31 19:11:58 +00:00
Michael Melesse
d024f0cfb8 update test_dot to use float 32 2022-10-31 18:58:10 +00:00
Michael Melesse
1811791665 add failures in report 2022-10-31 18:39:58 +00:00
Michael Melesse
9b3f2487b5 fix minor bug 2022-10-31 18:33:47 +00:00
rsanthanam-amd
14730a2352 Merge pull request #15 from ROCmSoftwarePlatform/bfloat_enable
unskip most bfloat tests
2022-10-31 13:10:30 -05:00
Mark Saroufim
578ada7740 [DOCS] Add install from source instructions to README (#821) 2022-10-31 11:08:18 -07:00
Michael Melesse
15683986cd unskip most bfloat tests 2022-10-31 18:04:54 +00:00
Phil Tillet
6311d70406 Revert "[BUILD] Now using cibuildwheel default"
This reverts commit 584086f08c.
2022-10-29 17:15:47 -07:00
Phil Tillet
584086f08c [BUILD] Now using cibuildwheel default 2022-10-29 16:59:06 -07:00
Keren Zhou
3ca667dfa8 [Frontend] Return a scalar if all input args are scalar (#816) 2022-10-28 23:27:06 -07:00
rsanthanam-amd
48fcd8c987 Merge pull request #14 from ROCmSoftwarePlatform/fix_vectorization
fix test_vectorization and test_load_cache_modifier
2022-10-28 16:12:57 -05:00
Michael Melesse
8d9572bc63 add similar fixes two addition tests 2022-10-28 20:34:58 +00:00
Michael Melesse
ffb30cdc52 skip ptx assert 2022-10-28 20:23:11 +00:00
Michael Melesse
7fce2bc5f1 add print_llvm_module 2022-10-28 20:07:35 +00:00
rsanthanam-amd
531ef18cb6 Fix for binop % (mod) unit test failures. (#13)
If the either data type if fp, then fmod should be used for the
reference computation.
2022-10-28 15:06:17 -04:00
Michael Melesse
5f0d90db7e tab prints 2022-10-28 19:05:42 +00:00
Michael Melesse
03ae41b310 add print helper 2022-10-28 17:55:28 +00:00
Michael Melesse
bd61338b31 update scripts 2022-10-28 17:48:26 +00:00
Michael Melesse
6e50f8b2c0 print irs 2022-10-28 17:46:52 +00:00
Michael Melesse
aa556d4f1b update script 2022-10-26 21:51:15 +00:00
Michael Melesse
61e88efb23 ignore logs 2022-10-26 21:42:41 +00:00
Michael Melesse
ed9638801a fix for test_cast 2022-10-26 21:34:58 +00:00
Michael Melesse
8ecab462f6 skip segfaults on ROCM 2022-10-26 20:46:47 +00:00
Michael Melesse
648e4cfe89 skip test_atomic_rmw on rocm 2022-10-26 18:22:23 +00:00
Michael Melesse
abe0d3e1b1 cast to amd device when as_nvidia shows up 2022-10-26 18:12:18 +00:00
Michael Melesse
4464dfcc18 save scripts 2022-10-26 17:42:58 +00:00
Michael Melesse
0cae0168ec fix bfloat failure 2022-10-26 17:40:28 +00:00
Michael Melesse
88d57ef9c9 add cache print 2022-10-26 17:19:30 +00:00
Michael Melesse
39381d99f8 send amdgcn to cache 2022-10-26 17:18:33 +00:00
Michael Melesse
df925f7187 add cache print script 2022-10-25 20:48:36 +00:00
Michael Melesse
e84297ca79 print cache 2022-10-25 20:44:42 +00:00
Michael Melesse
61c85c18b2 try to load binary 2022-10-25 20:29:43 +00:00
Michael Melesse
da5c24ffcb just clean cache 2022-10-25 20:27:13 +00:00
Michael Melesse
09302f0106 fix linking bug 2022-10-25 18:31:10 +00:00
Yanbo Liang
5ca1ed0101 Add bf16/fp16/fp64 support for ty_to_cpp (#800)
In ```torch._inductor```, we [convert 0d CPU tensor to scalar during
triton codegen](https://github.com/pytorch/pytorch/pull/87329), so need
add missing triton support for bf16/fp16/fp64.
2022-10-24 19:41:25 -07:00
Michael Melesse
9184b5cf65 add prints 2022-10-24 18:28:28 +00:00
Michael Melesse
8da4323514 write hipmodule bytes 2022-10-24 17:58:25 +00:00